DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 5

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

Silicon Errata Issues
1. Module: Data EEPROM
2. Module: CPU
© 2010 Microchip Technology Inc.
Note:
At device throughput is greater than 20 MIPS for
V
V
instructions (TBLRDL/TBLRDH) and instructions
that use Program Space Visibility (PSV) do not
function correctly when reading data from Data
EEPROM.
Work around
When reading data from Data EEPROM, the
application
operation to lower the frequency of the system
clock so that the throughput is less than 20 MIPS.
This may be easily performed at any time via the
Oscillator
(OSCCON<7:6>), that allow the application to
divide the system clock down by a factor of 4, 16
or 64.
Affected Silicon Revisions
The US bit (CORCON<12>) controls whether
MAC-type DSP instructions operate in Signed or
Unsigned mode. The device defaults to a Signed
mode on power-up (US = 0).
For this revision of silicon, MAC-type DSP
instructions do not function as specified in
Unsigned mode (US = 1). Also, for this revision,
the US bit will always read as ‘0’.
Work around
Ensure that the US bit is not set by the application.
In
multiplications, use the MCU Multiply instruction,
MUL.UU.
Affected Silicon Revisions
DD
DD
B1
B1
X
X
in the range 4.75V to 5.5V (or 10 MIPS for
order
in the range 3V to 3.6V), Table Read
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (B2).
B2
B2
X
X
should
to
Postscaler
perform
perform
unsigned
bits,
a
clock-switch
integer
POST
3. Module: CPU
Sequential MAC class instructions, which prefetch
data from Y data space using ±4 address
modification, will cause an address error trap. The
trap occurs only when all of the following
conditions are true:
1. Two sequential MAC class instructions (or a
2. Both instructions prefetch data from Y data
3. Neither
Work around
The problem described above can be avoided by
using any of the following methods:
1. Inserting any other instruction between the two
2. Adding an accumulator write back (a dummy
3. Do not use the + = 4 or - = 4 address
4. Do not prefetch data from Y space data.
Affected Silicon Revisions
B1
X
MAC class instruction executed in a REPEAT or
DO loop) that prefetch from Y data space.
space using the + = 4 or - = 4 address
modification.
accumulator write back.
MAC class instructions.
write back if needed) to either of the MAC class
instructions.
modification.
B2
X
of
dsPIC30F6010
the
instruction
DS80459D-page 5
uses
an