DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 9

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DSPIC30F6010-30I/PF

Manufacturer Part Number
DSPIC30F6010-30I/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
68
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F601030IPF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6010-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6010-30I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
8. Module: Interrupt Controller
© 2010 Microchip Technology Inc.
Catastrophic accumulator overflow traps are
enabled as follows:
A carry generated out of bit 39 in the accumulator
causes a catastrophic overflow of the accumulator
since the sign bit has been destroyed. If a math
error trap handler has been defined, the processor
will vector to the math error trap handler upon a
catastrophic overflow.
If the respective Accumulator Overflow Status bit,
OA or OB (SR<15/14>), is not cleared within the
trap handler routine prior to exiting the trap handler
routine, the processor will immediately re-enter the
trap handler routine.
- COVTE (INTCON1<8>) = 1
- SATA/SATB (CORCON <7/6>) = 0
EXAMPLE 7:
.global
__MathError:
Work around
If a math error trap occurs due to a catastrophic
accumulator overflow, the overflow status flags,
OA and/or OB (SR<15/14>), should be cleared
within the trap handler routine. Subsequently, the
MATHERR (INTCON1<4>) flag bit should be
cleared within the trap handler prior to executing
the RETFIE instruction.
Since the OA and OB bits are read-only bits, it will be
necessary to execute a dummy accumulator-based
instruction within the Trap Service Routine (TSR) in
order to clear these Status bits and eventually clear
the MATHERR trap flag. This is shown in Example 7.
Affected Silicon Revisions
B1
X
B2
X
__MathError
BTSC
CLR
BTSC
CLR
BCLR
RETFIE
USING DUMMY DSP
INSTRUCTION
dsPIC30F6010
SR, #OA
A
SR, #OB
B
INTCON1, #MATHERR
DS80459D-page 9

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