ADUC834BSZ Analog Devices Inc, ADUC834BSZ Datasheet - Page 61

• Manufacturer Part Number: ADUC834BSZ
• Description: IC ADC DUAL16/24BIT W/MCU 52MQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC834BSZ

• Core Size: 8-Bit
• Program Memory Size: 62KB (62K x 8)
• Oscillator Type: Internal
• Core Processor: 8052
• Speed: 12.58MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.25 V
• Data Converters: A/D 3x16b, 4x24b; D/A 1x12b
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 52-MQFP, 52-PQFP
• Controller Family/series: (8052) ADUC
• No. Of I/o's: 26
• Eeprom Memory Size: 62KB
• Ram Memory Size: 2KB
• Cpu Speed: 12.58MHz
• Package: 52MQFP
• Device Core: 8052
• Family Name: ADuC8xx
• Maximum Speed: 12.58 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• On-chip Adc: 4-chx16-bit|4-chx24-bit
• On-chip Dac: 1-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INTERRUPT SYSTEM
The ADuC834 provides a total of 11 interrupt sources with two priority levels. The control and configuration of the interrupt system
is carried out through three interrupt-related SFRs. These are the IE (Interrupt Enable) Register, the IP (Interrupt Priority Register)
and the IEIP2 (Secondary Interrupt Enable/Priority SFR) Registers. Their bit definitions are given in the Tables XXXV – XXXVII.
IE
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
IP
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
IEIP2
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
REV. A
Name
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
Name
–––
PADC
PT2
PS
PT1
PX1
PT0
PX0
Name
–––
PTI
PPSM
PSI
–––
ETI
EPSM
ESI
Interrupt Enable Register
Description
Written by User to Enable ‘1’ or Disable ‘0’ All Interrupt Sources
Written by User to Enable ‘1’ or Disable ‘0’ ADC Interrupt
Written by User to Enable ‘1’ or Disable ‘0’ Timer 2 Interrupt
Written by User to Enable ‘1’ or Disable ‘0’ UART Serial Port Interrupt
Written by User to Enable ‘1’ or Disable ‘0’ Timer 1 Interrupt
Written by User to Enable ‘1’ or Disable ‘0’ External Interrupt 1
Written by User to Enable ‘1’ or Disable ‘0’ Timer 0 Interrupt
Written by User to Enable ‘1’ or Disable ‘0’ External Interrupt 0
Interrupt Priority Register
Description
Reserved for Future Use
Written by User to Select ADC Interrupt Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select Timer 2 Interrupt Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select UART Serial Port Interrupt Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select Timer 1 Interrupt Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select External Interrupt 1 Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select Timer 0 Interrupt Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select External Interrupt 0 Priority (‘1’ = High; ‘0’ = Low)
Secondary Interrupt Enable and Priority Register
Description
Reserved for Future Use
Written by User to Select TIC Interrupt Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select Power Supply Monitor Interrupt Priority (‘1’ = High; ‘0’ = Low)
Written by User to Select SPI/I
Reserved. This Bit Must Be ‘0.’
Written by User to Enable ‘1’ or Disable ‘0’ TIC Interrupt
Written by User to Enable ‘1’ or Disable ‘0’ Power Supply Monitor Interrupt
Written by User to Enable ‘1’ or Disable ‘0’ SPI/I
A8H
00H
Yes
B8H
00H
Yes
A9H
A0H
No
Table XXXVII. IEIP2 SFR Bit Designations
Table XXXVI. IP SFR Bit Designations
Table XXXV. IE SFR Bit Designations
–61–
2
C Serial Port Interrupt Priority (‘1’ = High; ‘0’ = Low)
2
C Serial Port Interrupt
ADuC834