C8051F305-GS Silicon Laboratories Inc, C8051F305-GS Datasheet - Page 7

• Manufacturer Part Number: C8051F305-GS
• Description: IC 8051 MCU 2K FLASH 14-SOIC
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F305-GS

• Program Memory Type: FLASH
• Program Memory Size: 2KB (2K x 8)
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SMBus/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F300DK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1444 - ADAPTER PROGRAM TOOLSTICK F300
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1540-5

List of Figures
1. System Overview
2. Absolute Maximum Ratings
3. Global Electrical Characteristics
4. Pinout and Package Definitions
5. ADC0 (8-Bit ADC, C8051F300/2)
6. Voltage Reference (C8051F300/2)
7. Comparator0
8. CIP-51 Microcontroller
9. Reset Sources
Figure 1.1. C8051F300/2 Block Diagram ................................................................. 15
Figure 1.2. C8051F301/3/4/5 Block Diagram ........................................................... 15
Figure 1.3. Comparison of Peak MCU Execution Speeds ....................................... 16
Figure 1.4. On-Chip Clock and Reset ...................................................................... 17
Figure 1.5. On-chip Memory Map (C8051F300/1/2/3 Shown) ................................. 18
Figure 1.6. Development/In-System Debug Diagram............................................... 19
Figure 1.7. Digital Crossbar Diagram ....................................................................... 20
Figure 1.8. PCA Block Diagram ............................................................................... 21
Figure 1.9. PCA Block Diagram ............................................................................... 21
Figure 1.10. 8-Bit ADC Block Diagram ..................................................................... 22
Figure 1.11. Comparator Block Diagram .................................................................. 23
Figure 4.1. QFN-11 Pinout Diagram (Top View) ...................................................... 28
Figure 4.2. QFN-11 Package Drawing ..................................................................... 29
Figure 4.3. Typical QFN-11 Solder Paste Mask....................................................... 30
Figure 4.4. Typical QFN-11 Landing Diagram.......................................................... 31
Figure 4.5. SOIC-14 Pinout Diagram (Top View) ..................................................... 32
Figure 4.6. SOIC-14 Package Drawing .................................................................... 33
Figure 4.7. SOIC-14 PCB Land Pattern ................................................................... 34
Figure 5.1. ADC0 Functional Block Diagram............................................................ 35
Figure 5.2. Typical Temperature Sensor Transfer Function..................................... 37
Figure 5.3. Temperature Sensor Error with 1-Point Calibration (VREF = 2.40 V).... 38
Figure 5.4. 8-Bit ADC Track and Conversion Example Timing ................................ 40
Figure 5.5. ADC0 Equivalent Input Circuits.............................................................. 41
Figure 5.6. ADC Window Compare Examples, Single-Ended Mode........................ 45
Figure 5.7. ADC Window Compare Examples, Differential Mode ............................ 46
Figure 6.1. Voltage Reference Functional Block Diagram ....................................... 49
Figure 7.1. Comparator0 Functional Block Diagram ................................................ 51
Figure 7.2. Comparator Hysteresis Plot ................................................................... 52
Figure 8.1. CIP-51 Block Diagram............................................................................ 57
Figure 8.2. Program Memory Maps.......................................................................... 63
Figure 8.3. Data Memory Map.................................................................................. 64
Figure 9.1. Reset Sources........................................................................................ 83
Figure 9.2. Power-On and VDD Monitor Reset Timing ............................................ 84
Rev. 2.9
C8051F300/1/2/3/4/5
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