C8051F310-GQ Silicon Laboratories Inc, C8051F310-GQ Datasheet - Page 215

IC 8051 MCU 16K FLASH 32LQFP

C8051F310-GQ

Manufacturer Part Number
C8051F310-GQ
Description
IC 8051 MCU 16K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Datasheets

Specifications of C8051F310-GQ

Core Size
8-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
8051
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 21x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
29
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case
RoHS Compliant
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1445 - ADAPTER PROGRAM TOOLSTICK F310336-1329 - KIT REF DESIGN SENSORLESS BLDC336-1253 - DEV KIT FOR C8051F310/F311
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1252

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0
20.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging, Flash
programming, and boundary scan functions may be performed. This is possible because C2 communica-
tion is typically performed when the device is in the halt state, where all on-chip peripherals and user soft-
ware are stalled. In this halted state, the C2 interface can safely ‘borrow’ the C2CK (/RST) and C2D (P3.0)
pins. In most applications, external resistors are required to isolate C2 interface traffic from the user appli-
cation. A typical isolation configuration is shown in Figure 20.1.
The configuration in Figure 20.1 assumes the following:
Additional resistors may be necessary depending on the specific application.
1. The user input (b) cannot change state while the target device is halted.
2. The /RST pin on the target device is used as an input only.
/Reset (a)
Output (c)
Input (b)
Figure 20.1. Typical C2 Pin Sharing
C2 Interface Master
Rev. 1.5
C8051F310/1/2/3/4/5
C2CK
C2D
C8051Fxxx
215

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