C8051F310-GQ Silicon Laboratories Inc, C8051F310-GQ Datasheet - Page 43

• Manufacturer Part Number: C8051F310-GQ
• Description: IC 8051 MCU 16K FLASH 32LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F31xr

Specifications of C8051F310-GQ

• Core Size: 8-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: 8051
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 29
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• No. Of I/o's: 29
• Ram Memory Size: 1280Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 5
• Digital Ic Case: RoHS Compliant
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1445 - ADAPTER PROGRAM TOOLSTICK F310336-1329 - KIT REF DESIGN SENSORLESS BLDC336-1253 - DEV KIT FOR C8051F310/F311
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 336-1252

5.
The ADC0 subsystem for the C8051F310/1/2/3 consists of two analog multiplexers (referred to collectively
as AMUX0) with 25 total input selections, and a 200 ksps, 10-bit successive-approximation-register ADC
with integrated track-and-hold and programmable window detector. The AMUX0, data conversion modes,
and window detector are all configurable under software control via the Special Function Registers shown
in Figure 5.1. ADC0 operates in both Single-ended and Differential modes, and may be configured to mea-
sure P1.0-P3.4, the Temperature Sensor output, or V
ADC0 subsystem is enabled only when the AD0EN bit in the ADC0 Control register (ADC0CN) is set to
logic 1. The ADC0 subsystem is in low power shutdown when this bit is logic 0.
C8051F310/2
C8051F310/2
available on
available on
P3.1-3.4
P3.1-3.4
10-Bit ADC (ADC0, C8051F310/1/2/3 only)
Sensor
Temp
VREF
GND
P1.0
P1.7
P2.0
P2.7
P3.0
P3.4
VDD
P1.0
P1.7
P2.0
P2.7
P3.0
P3.4
Figure 5.1. ADC0 Functional Block Diagram
23-to-1
23-to-1
AMUX
AMUX
AMX0P
AMX0N
Rev. 1.5
DD
with respect to P1.0-P3.4, VREF, or GND. The
(+)
(-)
ADC0CF
C8051F310/1/2/3/4/5
ADC
10-Bit
VDD
SAR
ADC0GTH ADC0GTL
ADC0LTH
ADC0CN
ADC0LTL
Conversion
Start
000
001
010
011
100
101
32
AD0WINT
Compare
Window
CNVSTR Input
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
Timer 3 Overflow
Logic
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