R5F21122FP#U0 Renesas Electronics America, R5F21122FP#U0 Datasheet - Page 42

IC R8C MCU FLASH 8K 32LQFP

R5F21122FP#U0

Manufacturer Part Number
R5F21122FP#U0
Description
IC R8C MCU FLASH 8K 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/12r
Datasheets

Specifications of R5F21122FP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
LED, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21122FP#U0R5F21122FP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/12 Group
Rev.1.20
REJ09B0110-0120
7. Protection
Figure 7.1 PRCR Register
In the event that a program runs out of control, this function protects the important registers so that they
will not be rewritten easily. Figure 7.1 shows the PRCR register. The following lists the registers protected
by the PRCR register.
Set the PRC2 bit to “1” (write enabled) and then write to any address, and the PRC2 bit will be set to “0”
(write protected). The registers protected by the PRC2 bit should be changed in the next instruction after
setting the PRC2 bit to “1”. Make sure no interrupts will occur between the instruction in which the PRC2
bit is set to “1” and the next instruction. The PRC0 to PRC1 bits are not automatically set to “0” by writing
to any address. They can only be set to “0” in a program.
• Registers protected by PRC0 bit: CM0, CM1, and OCD registers
• Registers protected by PRC1 bit: PM0 and PM1 registers
• Registers protected by PRC2 bit: PD0 register
P r o t e c t r e g i s t e r
b 7
Jan 27, 2006
N O T E S :
1 . T h e P R C 2 b i t i s s e t t o “ 0 ” b y w r i t i n g t o a n y a d d r e s s a f t e r s e t t i n g i t t o “ 1 ” . O t h e r b i t s a r e n o t s e t t o “ 0 ”
b 6
b y w r i t i n g t o a n y a d d r e s s , a n d m u s t t h e r e f o r e b e s e t t o “ 0 ” i n a p r o g r a m .
b 5
0
b 4
0
b 3
0
b 2
page 30 of 181
b 1
b 0
Bit symbol
( b 7 - b 6 )
( b 5 - b 3 )
PRC0
PRC1
PRC2
S y m b o l
P R C R
R e s e r v e d b i t
R e s e r v e d b i t
Protect bit 0
Protect bit 1
P r o t e c t b i t 2
Bit name
A d d r e s s
0 0 0 A
1 6
0 0 X X X 0 0 0
A f t e r r e s e t
W h e n w r i t e , m u s t s e t t o " 0 "
W h e n r e a d , i t s c o n t e n t i s “ 0 ” .
Enable write to CM0, CM1, OCD
registers
0 : Write protected
1 : Write enabled
Enable write to PM0, PM1
registers
0 : Write protected
1 : Write enabled
Enable write to PD0 register
0 : Write protected
1 : Write enabled
2
Function
1
RW
RW
R W
R W
RW
7. Protection
R O

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