R5F21122FP#U0 Renesas Electronics America, R5F21122FP#U0 Datasheet - Page 58

• Manufacturer Part Number: R5F21122FP#U0
• Description: IC R8C MCU FLASH 8K 32LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/R8C/Tiny/12r

Specifications of R5F21122FP#U0

• Core Processor: R8C
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: LED, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 32-LQFP
• For Use With: R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/12 Group
Rev.1.20
REJ09B0110-0120
Figure 10.10 INTEN Register and INT0F Register
10.2 INT Interrupt
10.2.1 INT0 Interrupt
_______
INT0 interrupt is triggered by an INT0 input. When using INT0 interrupts, the INT0EN bit in the INTEN
register must be set to “1” (enabling). The edge polarity is selected using the INT0PL bit in the INTEN
register and the POL bit in the INT0IC register.
Inputs can be passed through a digital filter with three different sampling clocks.
The INT0 pin is shared with the external trigger input pin of Timer Z.
Figure 10.10 shows the INTEN and INT0F registers.
I N T 0 i n p u t f i l t e r s e l e c t r e g i s t e r
Jan 27, 2006
______
E x t e r n a l i n p u t e n a b l e r e g i s t e r
b7
b 7
0 0 0 0 0 0
NOTES:
1. This bit must be set while the INT0STG bit in the PUM register is set to “0” (one-shot trigger disabled).
2. When setting the INT0PL bit to “1” (selecting both edges), the POL bit in the INT0IC must be set to “0”
3. The IR bit in the INT0IC register may be set to “1” (interrupt requested) when the INT0PL bit is rewritten.
b6
b 6
_______
________
(selecting falling edge).
Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.
b5
b 5
b4
b4
b3
b 3
b2
0
b 2
page 46 of 181
b1
b 1
b0
b 0
B i t s y m b o l
Bit symbol
I N T 0 F 1
INT0F0
( b 7 - b 3 )
I N T 0 E N
I N T 0 P L
( b 7 - b 2 )
(b2)
S y m b o l
S y m b o l
I N T 0 F
I N T E N
Reserved bit
I N T 0 i n p u t e n a b l e b i t
I N T 0 i n p u t p o l a r i t y s e l e c t b i t
Reserved bit
INT0 input filter select bit
Nothing is assigned.
When write, set to “0”. If read, it content is
Bit name
Bit name
A d d r e s s
A d d r e s s
0 0 1 E
0 0 9 6
1 6
1 6
(1 )
(2 )
X X X X X 0 0 0
A f t e r r e s e t
A f t e r r e s e t
b 1 b 0
0 0 : N o f i l t e r
0 1 : F i l t e r w i t h f
1 0 : F i l t e r w i t h f
1 1 : F i l t e r w i t h f
Set to “0”
0 : D i s a b l e d
1 : E n a b l e d
0 : O n e e d g e
1 : B o t h e d g e s
Set to “0”
0 0
1 6
2
F u n c t i o n
F u n c t i o n
indeterminate.
1
8
3 2
s a m p l i n g
s a m p l i n g
s a m p l i n g
10.2 INT Interrupt
RW
RW
RW
R W
R W
R W
R W
RW