R5F21132FP#U0 Renesas Electronics America, R5F21132FP#U0 Datasheet - Page 201

IC R8C MCU FLASH 8K 32LQFP

R5F21132FP#U0

Manufacturer Part Number
R5F21132FP#U0
Description
IC R8C MCU FLASH 8K 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets

Specifications of R5F21132FP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21132FP#U0R5F21132FP
Manufacturer:
RENESAS
Quantity:
15 720
Company:
Part Number:
R5F21132FP#U0R5F21132FP#V0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/13 Group
Rev.1.20
REJ09B0111-0120
19.2 Interrupt
19.2.1 Reading Address 00000
19.2.2 SP Setting
19.2.3 External Interrupt and Key Input Interrupt
19.2.4 Watchdog Timer Interrupt
________
Do not read the address 00000
the CPU reads interrupt information (interrupt number and interrupt request level) from 00000
interrupt sequence. At this time, the acknowledged interrupt IR bit is set to “0”.
If the address 00000
among the enabled interrupts is set to “0”. This may cause a problem that the interrupt is canceled, or
an unexpected interrupt is generated.
Set any value in the SP before an interrupt is acknowledged. The SP is set to “0000
Therefore, if an interrupt is acknowledged before setting any value in the SP, the program may run out
of control.
Either an “L” level or an ”H” level of at least 250ns width is necessary for the signal input to the INT
INT
Reset the watchdog timer after a watchdog timer interrupt is generated.
Jan 27, 2006
3
pins and KI
_____
page 188 of 205
0
to KI
16
_____
3
is read by a program, the IR bit for the interrupt which has the highest priority
pins regardless of the CPU clock.
16
16
by a program. When a maskable interrupt request is acknowledged,
16
19. Usage Notes
” after reset.
16
________
in the
0
to

Related parts for R5F21132FP#U0