R5F21132FP#U0 Renesas Electronics America, R5F21132FP#U0 Datasheet - Page 55

IC R8C MCU FLASH 8K 32LQFP

R5F21132FP#U0

Manufacturer Part Number
R5F21132FP#U0
Description
IC R8C MCU FLASH 8K 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets

Specifications of R5F21132FP#U0

Core Processor
R8C
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company:
Part Number:
R5F21132FP#U0R5F21132FP
Manufacturer:
RENESAS
Quantity:
15 720
Company:
Part Number:
R5F21132FP#U0R5F21132FP#V0
Manufacturer:
Renesas Electronics America
Quantity:
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R8C/13 Group
Rev.1.20
REJ09B0111-0120
Table 6.4 Oscillation Stop Detection Function Specifications
Oscillation stop detectable clock and
frequency bandwidth
Enabling condition for oscillation stop
detection function
Operation at oscillation stop detection
6.5 Oscillation Stop Detection Function
The oscillation stop detection function is such that main clock oscillation circuit stop is detected. The
oscillation stop detection function can be enabled and disabled by the OCD1 to OCD0 bits in the OCD
register.
Table 6.4 lists the specifications of the oscillation stop detection function.
Where the main clock corresponds to the CPU clock source and the OCD1 to OCD0 bits are “11
(oscillation stop detection function enabled), the system is placed in the following state if the main clock
comes to a halt:
• OCD register OCD2 bit = 1 (selecting on-chip oscillator clock)
• OCD register OCD3 bit = 1 (main clock stopped)
• CM1 register CM14 bit = 0 (low-speed on-chip oscillator oscillating)
• Oscillation stop detection interrupt request occurs
6.5.1 How to Use Oscillation Stop Detection Function
• The oscillation stop detection interrupt shares the vector with the watchdog timer interrupt. If the
• Where the main clock re-oscillated after oscillation stop, the clock source for the CPU clock and
• To enter wait mode while using the oscillation stop detection function, set the CM02 bit to “0” (periph-
• Since the oscillation stop detection function is provided in preparation for main clock stop due to
• This function cannot be used when the main clock frequency is below 2 MHz. Set the OCD1 to OCD0
• When using the low-speed on-chip oscillator clock for the CPU clock and clock sources of peripheral
Jan 27, 2006
oscillation stop detection and watchdog timer interrupts both are used, the interrupt factor must be
determined. Table 6.5 shows how to determine the interrupt factor with the oscillation stop detection
interrupt, watchdog timer interrupt and voltage detection interrupt.
peripheral functions must be switched to the main clock in the program.
Figure 6.7 shows the procedure for switching the clock source from the low-speed on-chip oscillator
to the main clock.
eral function clocks not turned off during wait mode).
external factors, set the OCD1 to OCD0 bits to “00
where the main clock is stopped or oscillated in the program, that is where the stop mode is selected
or the CM05 bit is altered.
bits to “00
functions after detecting the oscillation stop, set the HR01 bit in the HR0 register to “0” (low-speed
on-chip oscillator selected) and the OCD1 to OCD0 bits to “11
enabled). When using the high-speed on-chip oscillator clock for the CPU clock and clock sources of
peripheral functions after detecting the oscillation stop, set the HR01 bit to “1” (high-speed on-chip
oscillator selected) and the OCD1 to OCD0 bits to “11
Item
2
” (oscillation stop detection function disabled).
page 42 of 205
f(X
Set OCD1 to OCD0 bits to “11
function enabled)
Oscillation stop detection interrupt occurs
IN
)
2 MHz
2
” (oscillation stop detection function disabled)
2
Specification
” (oscillation stop detection function enabled).
6.5 Oscillation Stop Detection Function
2
” (oscillation stop detection function
2
” (oscillation stop detection
2

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