MCHC908JW32FC Freescale Semiconductor, MCHC908JW32FC Datasheet - Page 201
![IC MCU 32K FLASH 8MHZ 48-QFN](/photos/12/17/121792/mchc908jw32fc_sml.jpg)
MCHC908JW32FC
Manufacturer Part Number
MCHC908JW32FC
Description
IC MCU 32K FLASH 8MHZ 48-QFN
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.RD3152MMA7260Q.pdf
(232 pages)
Specifications of MCHC908JW32FC
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, USB
Peripherals
LED, LVD, POR, PWM
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-QFN
Controller Family/series
HC08
No. Of I/o's
29
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SPI, USB
Rohs Compliant
Yes
Processor Series
HC08JW
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, USB
Number Of Programmable I/os
29
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
- Current page: 201 of 232
- Download datasheet (3Mb)
Chapter 17
Low-Voltage Inhibit (LVI)
17.1 Introduction
This section describes the low-voltage inhibit (LVI) module. The LVI module monitors the voltage on the
V
17.2 Features
Features of the LVI module include:
17.3 Functional Description
Figure 17-2
contains independent bandgap reference circuit and comparator for monitoring the V
reset performs a MCU internal reset and drives the RST pin low to provide low-voltage protection to
external peripheral devices.
LVISTOP, LVIPWRD, LVIRSTD are in the CONFIG1 register. See
(CONFIG)
until V
the state of the LVIOUT flag in the LVI status register (LVISR).
An LVI reset also drives the RST pin low to provide low-voltage protection to external peripheral devices.
Freescale Semiconductor
$FE0F
Addr.
DD
•
•
•
•
pin, and can force a reset when V
DD
Independent voltage monitoring circuits for V
Independent LVI circuit disable for V
Programmable LVI reset
Programmable stop mode operation
rises above V
for details of the LVI configuration bits. Once an LVI reset occurs, the MCU remains in reset
Register Name
shows the structure of the LVI module. The LVI is enabled out of reset. The LVI module
LVI Status Register
(LVISR)
TRIPR1
Reset:
Read:
Write:
which causes the MCU to exit reset. The output of the comparator controls
Figure 17-1. LVI I/O Register Summary
LVIOUT
Bit 7
MC68HC908JW32 Data Sheet, Rev. 6
0
DD
voltage falls below V
= Unimplemented
DD
6
0
0
DD
5
0
0
TRIPF1
4
0
0
Chapter 3 Configuration Registers
.
3
0
0
2
0
0
DD
voltage. An LVI
1
0
0
Bit 0
0
0
201
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