HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 167

IC H8 MCU FLASH 56K 64LQFP

HD64F3687GFPV

Manufacturer Part Number
HD64F3687GFPV
Description
IC H8 MCU FLASH 56K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3687GFPV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
Package
64LQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
45
Interface Type
I2C/SCI
On-chip Adc
8-chx10-bit
Number Of Timers
3
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3687GFPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3687GFPV
Manufacturer:
RENESAS
Quantity:
1 000
2.2.47 (3) ROTL (L)
Notes
ROTL (ROTate Left)
Operation
ERd (left rotation)
Assembly-Language Format
ROTL.L ERd
Operand Size
Longword
Description
This instruction rotates the bits in a 32-bit register ERd (destination register) one bit to the left.
The most significant bit is rotated to the least significant bit (bit 0), and also copied to the carry
flag.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Register direct
Addressing
Mode
Mnemonic
ROTL.L
C
ERd
Operands
MSB
b
31
ERd
1st byte
1
. . . . . .
2
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 31.
2nd byte
B
cleared to 0.
cleared to 0.
Instruction Format
— —
Rev. 3.00 Dec 13, 2004 page 151 of 258
I
0 erd
UI
Section 2 Instruction Descriptions
— —
H
3rd byte
LSB
b
0
U
N
4th byte
REJ09B0213-0300
Z
V
0
States
No. of
Rotate
C
2

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