HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 269

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.1
The CPU is driven by a clock, denoted by the symbol . One cycle of the clock is referred to as a
“state.” The memory cycle or bus cycle consists of two or three states. Different methods are used
to access on-chip memory, on-chip supporting modules, and external devices. Refer to the relevant
microcontroller hardware manual for details.
4.2
For high-speed processing, on-chip memory is accessed in two states. The data bus is 16 bits wide,
permitting both byte and word access. Figure 4.1 shows the on-chip memory access cycle. Figure
4.2 shows the pin states.
Internal address bus
Internal read signal
Internal data bus
(read access)
Internal write signal
Internal data bus
(write access)
Overview
On-Chip Memory (RAM, ROM)
Figure 4.1 On-Chip Memory Access Cycle
Section 4 Basic Timing
T
1
state
Bus cycle
Rev. 3.00 Dec 13, 2004 page 253 of 258
Address
Read data
Write data
T
2
state
Section 4 Basic Timing
REJ09B0213-0300