MC908AZ60ACFUE Freescale Semiconductor, MC908AZ60ACFUE Datasheet - Page 253

• Manufacturer Part Number: MC908AZ60ACFUE
• Description: IC MCU FLASH 8.4MHZ 60K 64QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60ACFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.3.2 Data Direction Register B
Data direction register B determines whether each port B pin is an input or an output. Writing a logic 1 to
a DDRB bit enables the output buffer for the corresponding port B pin; a logic 0 disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Figure 22-7
When bit DDRBx is a logic 1, reading address $0001 reads the PTBx data latch. When bit DDRBx is a
logic 0, reading address $0001 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Freescale Semiconductor
These read/write bits control port B data direction. Reset clears DDRB[7:0], configuring all port B pins
as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
X = don’t care
Hi-Z = high impedance
1. Writing affects data register, but does not affect input.
shows the port B I/O logic.
DDRB
Address:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Bit
0
1
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
READ DDRB ($0005)
WRITE DDRB ($0005)
WRITE PTB ($0001)
READ PTB ($0001)
DDRB7
$0005
Bit 7
0
PTB
Bit
Figure 22-6. Data Direction Register B (DDRB)
X
X
DDRB6
6
0
Table 22-2. Port B Pin Functions
RESET
Figure 22-7. Port B I/O Circuit
Input, Hi-Z
I/O Pin
Output
Mode
DDRB5
5
0
Table 22-2
NOTE
Accesses to DDRB
DDRB4
DDRBx
PTBx
4
0
Read/Write
DDRB[7:0]
DDRB[7:0]
summarizes the operation of the port B pins.
DDRB3
3
0
DDRB2
2
0
PTB[7:0]
Read
Pin
Accesses to PTB
DDRB1
1
0
PTB[7:0]
PTB[7:0]
Write
DDRB0
Bit 0
PTBx
0
(1)
Port B
253