MC9S12XEP100CAG Freescale Semiconductor, MC9S12XEP100CAG Datasheet - Page 465

IC MCU 16BIT 1M FLASH 144-LQFP

MC9S12XEP100CAG

Manufacturer Part Number
MC9S12XEP100CAG
Description
IC MCU 16BIT 1M FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XEP100CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
64 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
119
Number Of Timers
25
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
24-ch x 12-bit
Cpu Family
HCS12X
Device Core Size
16b
Frequency (max)
50MHz
Total Internal Ram Size
64KB
# I/os (max)
119
Number Of Timers - General Purpose
25
Operating Supply Voltage (typ)
1.8/2.8/5V
Operating Supply Voltage (max)
1.98/2.9/5.5V
Operating Supply Voltage (min)
1.72/2.7/3.13V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Package
144LQFP
Family Name
HCS12X
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|2.8|5 V
For Use With
EVB9S12XEP100 - BOARD EVAL FOR MC9S12XEP100DEMO9S12XEP100 - BOARD DEMO FOR MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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10.9
10.9.1
The recommended initialization of the XGATE is as follows:
The following code example implements the XGATE initialization sequence.
10.9.2
SCI_REGS
SCIBDH
SCIBDL
SCICR2
SCISR1
SCIDRL
TIE
TE
RE
Freescale Semiconductor
Arithmetic Immediate Instructions
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
1. Clear the XGE bit to suppress any incoming service requests.
2. Make sure that no thread is running on the XGATE. This can be done in several ways:
3. Set the XGVBR register to the lowest address of the XGATE vector space.
4. Clear all Channel ID flags.
5. Copy XGATE vectors and code into the RAM.
6. Initialize the S12X_INT module.
7. Enable the XGATE by setting the XGE bit.
SUBL RD, #IMM8
SUBH RD, #IMM8
CMPL RS, #IMM8
CPCH RS, #IMM8
ADDL RD, #IMM8
ADDH RD, #IMM8
LDL RD, #IMM8
LDH RD, #IMM8
a) Poll the XGCHID register until it reads $00. Also poll XGDBG and XGSWEF to make sure
b) Enter Debug Mode by setting the XGDBG bit. Clear the XGCHID register. Clear the XGDBG
The recommended method is a).
Initialization and Application Information
that the XGATE has not been stopped.
bit.
Initialization
Code Example (Transmit "Hello World!" on SCI)
Functionality
CPU
;###########################################
;#
;###########################################
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
EQU
Table 10-24. Instruction Set Summary (Sheet 3 of 3)
MC9S12XE-Family Reference Manual Rev. 1.23
S12X
$00C8
SCI_REGS+$00;
SCI_REGS+$00
SCI_REGS+$03
SCI_REGS+$04
SCI_REGS+$07
$80
$08
$04
15
1
1
1
1
1
1
1
1
14
1
1
1
1
1
1
1
1
13
0
0
0
0
1
1
1
1
SYMBOLS
;SCI register space
;SCI Baud Rate Register
;SCI Baud Rate Register
;SCI Control Register 2
;SCI Status
;SCI Control Register 2
;TIE bit mask
;TE bit mask
;RE bit mask
12
0
0
1
1
0
0
1
1
11
0
1
0
1
0
1
0
1
10
RD
RD
RD
RD
RD
RD
RS
RS
9
Register 1
8
7
#
6
Chapter 10 XGATE (S12XGATEV3)
5
4
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
IMM8
3
2
1
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