MC9S12XDT512MAA Freescale Semiconductor, MC9S12XDT512MAA Datasheet - Page 671

IC MCU 512K FLASH 80-QFP

MC9S12XDT512MAA

Manufacturer Part Number
MC9S12XDT512MAA
Description
IC MCU 512K FLASH 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDT512MAA

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
59
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
59
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
80PQFP
Family Name
HCS12
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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18.4
The MMC block performs several basic functions of the S12X sub-system operation: MCU operation
modes, priority control, address mapping, select signal generation and access limitations for the system.
Each aspect is described in the following subsections.
18.4.1
Freescale Semiconductor
Normal single-chip mode
There is no external bus in this mode. The MCU program is executed from the internal memory
and no external accesses are allowed.
Special single-chip mode
This mode is generally used for debugging single-chip operation, boot-strapping or security related
operations. The active background debug mode is in control of the CPU code execution and the
BDM firmware is waiting for serial commands sent through the BKGD pin. There is no external
bus in this mode.
Emulation single-chip mode
Tool vendors use this mode for emulation systems in which the user’s target application is normal
single-chip mode. Code is executed from external or internal memory depending on the set-up of
the EROMON bit (see
is active in both cases to allow observation of internal operations (internal visibility).
Functional Description
MCU Operating Mode
Section 18.3.2.5, “MMC Control Register
MC9S12XDP512 Data Sheet, Rev. 2.21
Chapter 18 Memory Mapping Control (S12XMMCV3)
(MMCCTL1)). The external bus
671

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