PIC18LF2523-I/SP Microchip Technology, PIC18LF2523-I/SP Datasheet - Page 253
![IC PIC MCU FLASH 16KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2523-I/SP
Manufacturer Part Number
PIC18LF2523-I/SP
Description
IC PIC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
5.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18LF2523-I/SP
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
10-chx12-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F2221-ISO PDF datasheet
- PIC18F2423-ISP PDF datasheet #2
- PIC18F2423-ISP PDF datasheet #3
- PIC18F2423-ISP PDF datasheet #4
- PIC18F2523-ISO PDF datasheet #5
- Current page: 253 of 392
- Download datasheet (7Mb)
22.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 22-1:
© 2007 Microchip Technology Inc.
HLVDCON
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Name
Operation During Sleep
VDIRMAG
GIE/GIEH PEIE/GIEL TMR0IE
OSCFIF
OCSFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
CMIF
CMIE
CMIP
Bit 6
—
IRVST
Bit 5
—
—
—
PIC18F2423/2523/4423/4523
Preliminary
HLVDEN
INT0IE
EEIE
EEIP
Bit 4
EEIF
HLVDL3
22.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
BCLIF
BCLIE
BCLIP
RBIE
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
HLVDIE
HLVDIP
HLVDIF
Bit 2
HLVDL1
TMR3IF
TMR3IE
TMR3IP
INT0IF
Bit 1
HLVDL0
CCP2IF
CCP2IE
CCP2IP
DS39755B-page 251
Bit 0
RBIF
on Page
Values
Reset
50
49
52
52
52
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