PIC18LF2523-I/SP Microchip Technology, PIC18LF2523-I/SP Datasheet - Page 50
![IC PIC MCU FLASH 16KX16 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2523-I/SP
Manufacturer Part Number
PIC18LF2523-I/SP
Description
IC PIC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
5.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18LF2523-I/SP
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
10-chx12-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F2221-ISO PDF datasheet
- PIC18F2423-ISP PDF datasheet #2
- PIC18F2423-ISP PDF datasheet #3
- PIC18F2423-ISP PDF datasheet #4
- PIC18F2523-ISO PDF datasheet #5
- Current page: 50 of 392
- Download datasheet (7Mb)
PIC18F2423/2523/4423/4523
4.6
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal oper-
ation. Status bits from the RCON register, RI, TO, PD,
POR and BOR, are set or cleared differently in different
Reset situations, as indicated in Table 4-3. These bits
are used in software to determine the nature of the
Reset.
TABLE 4-3:
DS39755B-page 48
Power-on Reset
RESET Instruction
Brown-out Reset
MCLR during Power-Managed
Run Modes
MCLR during Power-Managed Idle
Modes and Sleep Mode
WDT Time-out during Full Power or
Power-Managed Run Mode
MCLR during Full Power Execution
Stack Full Reset (STVREN = 1)
Stack Underflow Reset
(STVREN = 1)
Stack Underflow Error (not an
actual Reset, STVREN = 0)
WDT Time-out during
Power-Managed Idle or Sleep
Modes
Interrupt Exit from
Power-Managed Modes
Legend: u = unchanged
Note 1:
2:
Reset State of Registers
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (008h or 0018h).
Reset state is ‘1’ for POR and unchanged for all other Resets when software BOR is enabled
(BOREN1:BOREN0 Configuration bits = 01 and SBOREN = 1); otherwise, the Reset state is ‘0’.
Condition
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION
FOR RCON REGISTER
Program
PC + 2
Counter
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
(1)
Preliminary
RI
1
0
1
u
u
u
u
u
u
u
u
u
TO
Table 4-4 describes the Reset states for all of the
Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets and WDT wake-ups.
1
u
1
1
1
0
u
u
u
u
0
u
RCON Register
PD
1
u
1
u
0
u
u
u
u
u
0
0
POR
0
u
u
u
u
u
u
u
u
u
u
u
BOR
© 2007 Microchip Technology Inc.
0
u
0
u
u
u
u
u
u
u
u
u
STKFUL
STKPTR Register
0
u
u
u
u
u
u
1
u
u
u
u
STKUNF
0
u
u
u
u
u
u
u
1
1
u
u
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