C8051T606-GM Silicon Laboratories Inc, C8051T606-GM Datasheet - Page 116

• Manufacturer Part Number: C8051T606-GM
• Description: IC 8051 MCU 1.5K-EEPROM 11-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051T60xr

Specifications of C8051T606-GM

• Program Memory Type: OTP
• Program Memory Size: 1.5KB (1.5K x 8)
• Package / Case: 11-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 6
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051T6x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051T606DK
• Minimum Operating Temperature: - 40 C
• Package: 11QFN EP
• Device Core: 8051
• Family Name: C8051T60x
• Maximum Speed: 25 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1668 - CARD DAUGHTER QFN10 SOCKET336-1667 - CARD DAUGHTER MSOP SOCKET336-1666 - KIT DEVELOPMENT FOR C8051T606336-1404 - KIT DEV FOR C8051T60X MCU'S
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1662-5

C8051T600/1/2/3/4/5/6
SFR Definition 22.2. XBR1: Port I/O Crossbar Register 1
SFR Address = 0xE2
116
Name
Reset
7:6 PCA0ME[1:0] PCA Module I/O Enable Bits.
Bit
Type
5
4
3
2
1
0
Bit
SYSCKE
SMB0E
CP0AE
URX0E
UTX0E
Name
CP0E
R/W
PCA0ME[1:0]
7
0
00: All PCA I/O unavailable at Port pins.
01: CEX0 routed to Port pin.
10: CEX0, CEX1 routed to Port pins.
11: CEX0, CEX1, CEX2 routed to Port pins.
Comparator0 Asynchronous Output Enable.
0: Asynchronous CP0 unavailable at Port pin.
1: Asynchronous CP0 routed to Port pin.
Comparator0 Output Enable.
0: CP0 unavailable at Port pin.
1: CP0 routed to Port pin.
/SYSCLK Output Enable.
0: /SYSCLK unavailable at Port pin.
1: /SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pins.
1: SMBus I/O (SDA, SCL) routed to Port pins.
UART RX Input Enable.
0: UART RX unavailable at Port pin.
1: UART RX0 routed to Port pin P0.5.
UART TX Output Enable.
0: UART TX0 unavailable at Port pin.
1: UART TX0 routed to Port pin P0.4.
R/W
6
0
CP0AE
R/W
5
0
CP0E
R/W
Rev. 1.2
4
0
SYSCKE
Function
R/W
3
0
SMB0E
R/W
2
0
URX0E
R/W
1
0
UTX0E
R/W
0
0