C8051F341-GQ Silicon Laboratories Inc, C8051F341-GQ Datasheet - Page 241
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C8051F341-GQ
Manufacturer Part Number
C8051F341-GQ
Description
IC 8051 MCU FLASH 32K 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F34xr
Datasheets
1.C8051F349-GQ.pdf
(276 pages)
2.C8051F341-GQ.pdf
(1 pages)
3.C8051F347-GQ.pdf
(296 pages)
Specifications of C8051F341-GQ
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-TQFP, 48-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
40
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 20x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
I2C/SMBus/SPI/UART/USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
40
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F340DK
Minimum Operating Temperature
- 40 C
On-chip Adc
17-ch x 10-bit
No. Of I/o's
40
Ram Memory Size
2304Byte
Cpu Speed
48MHz
No. Of Timers
4
Rohs Compliant
Yes
Package
48TQFP
Device Core
8051
Family Name
C8051F34x
Maximum Speed
48 MHz
Data Rom Size
128 B
A/d Bit Size
10 bit
A/d Channels Available
17
Height
1 mm
Length
7 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1452 - ADAPTER PROGRAM TOOLSTICK F340
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1299
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F341-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F341-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bits1–0: SCA1-SCA0: Timer 0/1 Prescale Bits.
T3MH
R/W
Bit7
T3MH: Timer 3 High Byte Clock Select.
This bit selects the clock supplied to the Timer 3 high byte if Timer 3 is configured in split
8-bit timer mode. T3MH is ignored if Timer 3 is in any other mode.
0: Timer 3 high byte uses the clock defined by the T3XCLK bit in TMR3CN.
1: Timer 3 high byte uses the system clock.
T3ML: Timer 3 Low Byte Clock Select.
This bit selects the clock supplied to Timer 3. If Timer 3 is configured in split 8-bit timer
mode, this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 3 low byte uses the clock defined by the T3XCLK bit in TMR3CN.
1: Timer 3 low byte uses the system clock.
T2MH: Timer 2 High Byte Clock Select.
This bit selects the clock supplied to the Timer 2 high byte if Timer 2 is configured in split
8-bit timer mode. T2MH is ignored if Timer 2 is in any other mode.
0: Timer 2 high byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 high byte uses the system clock.
T2ML: Timer 2 Low Byte Clock Select.
This bit selects the clock supplied to Timer 2. If Timer 2 is configured in split 8-bit timer
mode, this bit selects the clock supplied to the lower 8-bit timer.
0: Timer 2 low byte uses the clock defined by the T2XCLK bit in TMR2CN.
1: Timer 2 low byte uses the system clock.
T1M: Timer 1 Clock Select.
This select the clock source supplied to Timer 1. T1M is ignored when C/T1 is set to logic 1.
0: Timer 1 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Timer 1 uses the system clock.
T0M: Timer 0 Clock Select.
This bit selects the clock source supplied to Timer 0. T0M is ignored when C/T0 is set to
logic 1.
0: Counter/Timer 0 uses the clock defined by the prescale bits, SCA1-SCA0.
1: Counter/Timer 0 uses the system clock.
These bits control the division of the clock supplied to Timer 0 and/or Timer 1 if configured
to use prescaled clock inputs.
Note: External clock divided by 8 is synchronized with the
SCA1
T3ML
0
0
1
1
R/W
Bit6
system clock.
SCA0
SFR Definition 21.3. CKCON: Clock Control
0
1
0
1
T2MH
R/W
Bit5
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
System clock divided by 12
System clock divided by 48
External clock divided by 8
System clock divided by 4
T2ML
R/W
Bit4
Prescaled Clock
Rev. 1.3
T1M
R/W
Bit3
T0M
R/W
Bit2
SCA1
R/W
Bit1
SCA0
R/W
Bit0
SFR Address:
00000000
Reset Value
0x8E
241