MC9S12C32MFUE25 Freescale Semiconductor, MC9S12C32MFUE25 Datasheet - Page 333

IC MCU 32K FLASH 25MHZ 80-QFP

MC9S12C32MFUE25

Manufacturer Part Number
MC9S12C32MFUE25
Description
IC MCU 32K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32MFUE25

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
60
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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The synchronization jump width (see the Bosch CAN specification for details) can be programmed in a
range of 1 to 4 time quanta by setting the SJW parameter.
The SYNC_SEG, TSEG1, TSEG2, and SJW parameters are set by programming the MSCAN bus timing
registers (CANBTR0, CANBTR1) (see
and
Table 10-34
10.4.4
10.4.4.1
The MSCAN module behaves as described within this specification in all normal system operation modes.
10.4.4.2
The MSCAN module behaves as described within this specification in all special system operation modes.
Freescale Semiconductor
Section 10.3.2.4, “MSCAN Bus Timing Register 1
Time Segment 1
Modes of Operation
gives an overview of the CAN compliant segment settings and the related parameter values.
Normal Modes
Special Modes
5 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
It is the user’s responsibility to ensure the bit time settings are in compliance
with the CAN standard.
Transmit Point
Sample Point
SYNC_SEG
Syntax
Table 10-34. CAN Standard Compliant Bit Time Segment Settings
TSEG1
3 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
4 .. 9
System expects transitions to occur on the CAN bus during this
period.
A node in transmit mode transfers a new value to the CAN bus at
this point.
A node in receive mode samples the CAN bus at this point. If the
three samples per bit option is selected, then this point marks the
position of the third sample.
Table 10-33. Time Segment Syntax
MC9S12C-Family / MC9S12GC-Family
Time Segment 2
Section 10.3.2.3, “MSCAN Bus Timing Register 0
2
3
4
5
6
7
8
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Rev 01.24
NOTE
(CANBTR1)”).
Description
TSEG2
1
2
3
4
5
6
7
Synchronization
Jump Width
1 .. 2
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
(CANBTR0)”
SJW
0 .. 1
0 .. 2
0 .. 3
0 .. 3
0 .. 3
0 .. 3
0 .. 3
333

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