HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 144

• Manufacturer Part Number: HD6417041AVF16V
• Description: IC SUPERH MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD6417041AVF16V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Instruction Descriptions
Rev. 5.00 Jun 30, 2004 page 128 of 512
REJ09B0171-0500O
unsigned short Write_Word(unsigned long Addr, unsigned long Data);
unsigned long
Starts execution from the slot instruction located at an address (Addr – 4). For Delay_Slot (4),
execution starts from an instruction at address 0 rather than address 4. When execution moves
from this function to one of the following instructions and one of the listed instructions
precedes it, it will be considered an illegal slot instruction (the listed instructions become
illegal slot instructions when used as delay slot instructions):
Delay_Slot(unsigned long Addr);
unsigned log IS_32bit_Inst(unsigned long Addr)
If the address (Addr_4) instruction is 32-bit, 2 is returned; 0 is returned if it is 16-bit.
List registers:
unsigned long R[16];
unsigned long SR,GBR,VBR;
unsigned long MACH,MACL,PR;
unsigned long PC;
Definition of SR structures:
struct SR0 {
};
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
unsigned long
BF, BT, BRA, BSR, JMP, JSR, RTS, RTE, TRAPA, BF/S, BT/S, BRAF, BSRF
Write_Long(unsigned long Addr, unsigned long Data);
dummy0:4;
RC0:12;
dummy1:4;
DMY0:1;
DMX0:1;
M0:1;
Q0:1;
I0:4;
RF10:1;
RF00:1;
S0:1;
T0:1;