HD6417041AVF16V Renesas Electronics America, HD6417041AVF16V Datasheet - Page 151

• Manufacturer Part Number: HD6417041AVF16V
• Description: IC SUPERH MCU ROMLESS 144QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD6417041AVF16V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 98
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

6.1.5
Description: Logically ANDs the contents of general registers Rn and Rm, and stores the result in
Rn. The contents of general register R0 can be ANDed with zero-extended 8-bit immediate data.
8-bit memory data pointed to by GBR relative addressing can be ANDed with 8-bit immediate
data.
Note: After AND #imm, R0 is executed and the upper 24 bits of R0 are always cleared to 0.
Operation:
Format
AND
AND
AND.B #imm,
AND(long m,long n)
{
}
ANDI(long i) /* AND #imm,R0 */
{
}
ANDM(long i) /* AND.B #imm,@(R0,GBR) */
{
R[n]&=R[m]
PC+=2;
R[0]&=(0x000000FF & (long)i);
PC+=2;
long temp;
temp=(long)Read_Byte(GBR+R[0]);
temp&=(0x000000FF & (long)i);
Write_Byte(GBR+R[0],temp);
Rm,Rn
#imm,R0
@(R0,GBR)
AND (AND Logical): Logic Operation Instruction
Abstract
Rn & Rm
R0 & imm
(R0 + GBR) &
imm
(R0 + GBR)
/* AND Rm,Rn */
Rn
R0
Code
0010nnnnmmmm1001
11001001iiiiiiii
11001101iiiiiiii
Rev. 5.00 Jun 30, 2004 page 135 of 512
Cycle
1
1
3
Section 6 Instruction Descriptions
T Bit
—
—
—
REJ09B0171-0500O
SH-1
Instructions
Applicable
SH-2
SH-
DSP