M30879FLFP#U3 Renesas Electronics America, M30879FLFP#U3 Datasheet - Page 358
M30879FLFP#U3
Manufacturer Part Number
M30879FLFP#U3
Description
IC M32C/87 MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(93 pages)
2.M3087BFLGPU3.pdf
(629 pages)
3.M3087BFLGPU3.pdf
(364 pages)
Specifications of M30879FLFP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Manufacturer
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 334 of 587
Figure 22.13
Group 2 Function Select Register
Group 2 Function Enable Register
b7 b6 b5 b4
b7 b6 b5 b4
b3
b3
G2RTP Register, G2FE Register
b2
b2
b1
b1
b0
b0
Bit Symbol
Bit Symbol
RTP0
RTP1
RTP2
RTP3
RTP4
RTP5
RTP6
RTP7
IFE0
IFE1
IFE2
IFE3
IFE4
IFE5
IFE6
IFE7
Symbol
G2RTP
Symbol
G2FE
Channel 0 RTP output buffer
Channel 1 RTP output buffer
Channel 2 RTP output buffer
Channel 3 RTP output buffer
Channel 4 RTP output buffer
Channel 5 RTP output buffer
Channel 6 RTP output buffer
Channel 7 RTP output buffer
Channel 0
function enable bit
Channel 1
function enable bit
Channel 2
function enable bit
Channel 3
function enable bit
Channel 4
function enable bit
Channel 5
function enable bit
Channel 6
function enable bit
Channel 7
function enable bit
Bit Name
Bit Name
Address
0167h
Address
0166h
0: Channel i's function disabled (i = 0 to 7)
1: Channel i's function enabled
0: “L” output
1: “H” output
Function
Function
After Reset
00h
After Reset
00h
22. Intelligent I/O
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
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