MCIMX515CJM6C Freescale Semiconductor, MCIMX515CJM6C Datasheet - Page 87

• Manufacturer Part Number: MCIMX515CJM6C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX515CJM6C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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Freescale Semiconductor
DIx_DISP_CLK
DISPx_DAT22
DISPx_DAT23
DIx_D0_CS
DIx_D1_CS
This mode works in compliance with recommendation ITU-R BT.656. The timing reference signals (frame start, frame end, line
start, and line end) are embedded in the 8-bit data bus. Only video data is supported, transmission of non-video related data
during blanking intervals is not supported.
Port Name
DIx_PIN12
DIx_PIN13
DIx_PIN14
DIx_PIN15
DIx_PIN16
DIx_PIN17
DIx_PIN11
Signal mapping (both data and control/synchronization) is flexible. The table provides examples.
DIx_PIN1
DIx_PIN2
DIx_PIN3
DIx_PIN4
DIx_PIN5
DIx_PIN6
DIx_PIN7
DIx_PIN8
i.MX51
(x=1,2)
(General)
DAT[22]
DAT[23]
Signal
Name
RGB,
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
16-bit
RGB
—
—
Table 79. Video Signal Cross-Reference (continued)
RGB/TV Signal Allocation (Example)
18-bit
RGB
—
—
DRDY/DV
HSYNC
VSYNC
PixCLK
24-bit
RGB
R[6]
R[7]
—
—
—
—
—
—
—
—
—
—
—
—
—
Q
LCD
YCrCb
8-bit
—
—
2
YCrCb
16-bit
—
—
YCrCb
20-bit
—
—
VSYNC_IN May be required for anti-tearing
Signal
Smart
DRDY
Name
CS0
CS1
RS1
RS2
WR
RD
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSYNC out
Additional frame/row synchronous
signals with programmable timing
—
Alternate mode of PWM output for
contrast or brightness control
—
—
Register select signal
Optional RS2
Data validation/blank, data enable
Additional data synchronous
signals with programmable
features/timing
Electrical Characteristics
Comment
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