ATTINY48-MMH Atmel, ATTINY48-MMH Datasheet - Page 292
![MCU AVR 4KB FLASH 12MHZ 28-VQFN](/photos/12/32/123209/28m1-vqfn_sml.jpg)
ATTINY48-MMH
Manufacturer Part Number
ATTINY48-MMH
Description
MCU AVR 4KB FLASH 12MHZ 28-VQFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY48-MMH
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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29. Datasheet Revision History
29.1
29.2
29.3
29.4
292
Rev. 8008G - 04/11
Rev. 8008F - 06/10
Rev. 8008E - 05/10
Rev. 8008D - 03/10
ATtiny48/88
Please note that page references in this section refer to the current revision of this document.
1. Updated:
2. Added:
3. Changed document status from “Preliminary” to “Final”.
1. Updated notes 1 and 10 in table in
2. Updated package drawing in
3. Updated bit syntax throughout the datasheet, e.g. from CS02:0 to CS0[2:0].
1.
2.
1. Separated Typical Characteristic plots, added
2. Updated:
3. Added:
–
–
–
–
–
–
–
–
–
–
–
Section 24. “Register Summary” on page
Section 27.1 “28M1” on page 285
–
–
–
–
–
– UFBGA package (32CC1) in,
“Block Diagram” on page 5
“Memories” on page 17
“Clock System” on page 28
“Lock Bits, Fuse Bits and Device Signature” on page 188
“External Programming” on page 191
“Speed” on page 208
“Two-Wire Serial Interface Characteristics” on page 212
“Capacitive Touch Sensing” on page 7
“Register Description” on page 15
“Overview” on page 129
“Compatibility with SMBus” on page 156
Section 1.1 “Pin Descriptions” on page
and ‘high sink’.
Table 6-3 on page 28
Section 6.2.3 “Internal 128 kHz Oscillator” on page 31
Section 8.4 “Watchdog Timer” on page
Section 22.2 “DC Characteristics” on page
Section 26. “Ordering Information” on page
Information” on page 285
adjusted, to fix TBD.
Section 27.4 “32CC1” on page
“Features” on page
updated with correct package drawing.
Section 22.2 “DC Characteristics” on page
3, Port D, adjusted texts ‘sink and source’
277, added SPH at address 0x3E.
46, updated.
206, updated TBD in notes 5 and 8.
283, and
Section 23.2 “ATtiny88” on page
1,
“Pin Configurations” on page
Section 27. “Packaging
adjusted, to fix TBD.
288.
8008G–AVR–04/11
206.
248.
2,
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