ATTINY48-MMH Atmel, ATTINY48-MMH Datasheet - Page 297
![MCU AVR 4KB FLASH 12MHZ 28-VQFN](/photos/12/32/123209/28m1-vqfn_sml.jpg)
ATTINY48-MMH
Manufacturer Part Number
ATTINY48-MMH
Description
MCU AVR 4KB FLASH 12MHZ 28-VQFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY48-MMH
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8008G–AVR–04/11
13 Timer/Counter0 and Timer/Counter1 Prescalers .............................. 117
14 SPI – Serial Peripheral Interface ......................................................... 120
15 TWI – Two Wire Interface .................................................................... 129
16 Analog Comparator ............................................................................. 161
12.3
12.4
12.5
12.6
12.7
12.8
12.9
12.10
12.11
13.1
13.2
13.3
13.4
14.1
14.2
14.3
14.4
14.5
15.1
15.2
15.3
15.4
15.5
15.6
15.7
15.8
15.9
15.10
15.11
16.1
16.2
Accessing 16-bit Registers ..............................................................................91
Timer/Counter Clock Sources .........................................................................93
Counter Unit ....................................................................................................94
Input Capture Unit ...........................................................................................95
Output Compare Units .....................................................................................97
Compare Match Output Unit ............................................................................99
Modes of Operation .......................................................................................100
Timer/Counter Timing Diagrams ...................................................................107
Register Description ......................................................................................110
Internal Clock Source ....................................................................................117
Prescaler Reset .............................................................................................117
External Clock Source ...................................................................................117
Register Description ......................................................................................118
Features ........................................................................................................120
Overview ........................................................................................................120
SS Pin Functionality ......................................................................................124
Data Modes ...................................................................................................125
Register Description ......................................................................................126
Features ........................................................................................................129
Overview ........................................................................................................129
Bus Definitions ...............................................................................................129
Data Transfer and Frame Format ..................................................................130
Multi-master Bus Systems, Arbitration and Synchronization .........................133
Overview of the TWI Module .........................................................................135
Using the TWI ................................................................................................137
Transmission Modes .....................................................................................140
Multi-master Systems and Arbitration ............................................................154
Compatibility with SMBus ..............................................................................156
Register Description ......................................................................................156
Analog Comparator Multiplexed Input ...........................................................161
Register Description ......................................................................................162
ATtiny48/88
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