PIC16F72-I/SOG Microchip Technology, PIC16F72-I/SOG Datasheet - Page 30

• Manufacturer Part Number: PIC16F72-I/SOG
• Description: IC PIC MCU FLASH 2KX14 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F72-I/SOG

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC16F72
4.3
When no prescaler is used, the external clock input is
the same as the prescaler output. The synchronization
of T0CKI, with the internal phase clocks, is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks. Therefore, it is
necessary for T0CKI to be high for at least 2 T
a small RC delay of 20 ns) and low for at least 2 T
(and a small RC delay of 20 ns). Refer to the electrical
specification of the desired device.
4.4
There is only one prescaler available, which is mutually
exclusively shared between the Timer0 module and the
Watchdog Timer. A prescaler assignment for the
TABLE 4-1:
DS39597C-page 28
01h,101h
0Bh,8Bh,
10Bh,18Bh
81h,181h
Legend: x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by Timer0.
Address
Using Timer0 with an External
Clock
Prescaler
TMR0
INTCON
OPTION RBPU INTEDG T0CS
Name
REGISTERS ASSOCIATED WITH TIMER0
Timer0 Module Register
Bit 7
GIE
PEIE
Bit 6
TMR0IE INTE
Bit 5
OSC
(and
OSC
T0SE
Bit 4
RBIE TMR0IF INTF
Bit 3
PSA
Timer0 module means that there is no prescaler for the
Watchdog Timer, and vice-versa. This prescaler is not
readable or writable (see Figure 4-1).
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g., CLRF 1, MOVWF 1,
BSF
assigned to WDT, a CLRWDT instruction will clear the
prescaler along with the Watchdog Timer. The
prescaler is not readable or writable.
Note:
Bit 2
PS2
1,x....etc.) will clear the prescaler. When
Writing to TMR0 when the prescaler is
assigned to Timer0, will clear the prescaler
count but will not change the prescaler
assignment.
Bit 1
PS1
RBIF 0000 000x 0000 000u
Bit 0
PS0
© 2007 Microchip Technology Inc.
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
POR, BOR
Value on
Value on
RESETS
all other