ATMEGA32U2-AUR Atmel, ATMEGA32U2-AUR Datasheet - Page 43
![MCU AVR 32K FLASH 16MHZ 32TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA32U2-AUR
Manufacturer Part Number
ATMEGA32U2-AUR
Description
MCU AVR 32K FLASH 16MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA32U2-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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9.4
9.5
9.6
9.7
9.8
7799D–AVR–11/10
Power-down Mode
Power-save Mode
Standby Mode
Extended Standby Mode
Power Reduction Register
Watchdog, and the interrupt system to continue operating. This sleep mode basically halts
clk
Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
ones like the Timer Overflow, USART Transmit Complete or some USB interrupts (like SOFI,
WAKEUPI...). If wake-up from the Analog Comparator interrupt is not required, the Analog Com-
parator can be powered down by setting the ACD bit in the Analog Comparator Control and
Status Register – ACSR. This will reduce power consumption in Idle mode.
When the SM2:0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-
down mode. In this mode, the external Oscillator is stopped, while the external interrupts, the 2-
wire Serial Interface, and the Watchdog continue operating (if enabled). Only an External Reset,
a Watchdog Reset, a Brown-out Reset, 2-wire Serial Interface address match, an external level
interrupt on INT7:4, an external interrupt on INT3:0, a pin change interrupt or an asynchronous
USB interrupt source (WAKEUPI only), can wake up the MCU. This sleep mode basically halts
all generated clocks, allowing operation of asynchronous modules only.
Note that if a level triggered interrupt is used for wake-up from Power-down mode, the changed
level must be held for some time to wake up the MCU. Refer to
for details.
When waking up from Power-down mode, there is a delay from the wake-up condition occurs
until the wake-up becomes effective. This allows the clock to restart and become stable after
having been stopped. The wake-up period is defined by the same CKSEL Fuses that define the
Reset Time-out period, as described in
When the SM2:0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-
save mode. This mode is identical to Power-down. This mode has been conserved for compati-
bility purpose with higher-end products.
When the SM2:0 bits are 110 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in six clock cycles.
When the SM2:0 bits are 111 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Extended Standby mode. This mode is identical to
Power-save mode with the exception that the Oscillator is kept running. So Extended Standby
Mode is equivalent to Standy Mode, but is also conserved for compatibility purpose. From
Extended Standby mode, the device wakes up in six clock cycle.
The Power Reduction Registers (PRR0 and PRR1), provides a method to stop the clock to indi-
vidual peripherals to reduce power consumption. See
“PRR1 – Power Reduction Register 1” on page 46
is frozen and the I/O registers can not be read or written. Resources used by the peripheral
CPU
and clk
FLASH
, while allowing the other clocks to run.
“Clock Sources” on page
for details. The current state of the peripheral
ATmega8U2/16U2/32U2
“PRR0 – Power Reduction Register 0”
“External Interrupts” on page 84
29.
and
43
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