ATMEGA16A-AUR Atmel, ATMEGA16A-AUR Datasheet - Page 17

• Manufacturer Part Number: ATMEGA16A-AUR
• Description: MCU AVR 16KB FLASH 16MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3
7.3.1
8154B–AVR–07/09
SRAM Data Memory
Data Memory Access Times
Figure 7-2
The lower 1120 Data Memory locations address the Register File, the I/O Memory, and the inter-
nal data SRAM. The first 96 locations address the Register File and I/O Memory, and the next
1024 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 1024 bytes of internal data
SRAM in the ATmega16A are all accessible through all these addressing modes. The Register
File is described in
Figure 7-2.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
shows how the ATmega16A SRAM Memory is organized.
Data Memory Map
I/O Registers
Register File
“General Purpose Register File” on page
R29
R30
R31
$3D
$3E
$00
$01
$02
$3F
R0
R1
R2
...
...
CPU
cycles as described in
11.
Data Address Space
Internal SRAM
$001D
$001E
$005D
$005E
$045E
$0000
$0001
$001F
$0020
$0021
$0022
$005F
$0060
$0061
$045F
$0002
...
...
...
ATmega16A
Figure
7-3.
17