ATMEGA16A-AUR Atmel, ATMEGA16A-AUR Datasheet - Page 239

• Manufacturer Part Number: ATMEGA16A-AUR
• Description: MCU AVR 16KB FLASH 16MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.5.5
8154B–AVR–07/09
Scanning the Analog Comparator
Figure 24-7. Boundary-scan Cells for Oscillators and Clock Options
Table 24-4
XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.
Table 24-4.
Notes:
The relevant Comparator signals regarding Boundary-scan are shown in
Boundary-scan cell from
described in
The Comparator need not be used for pure connectivity testing, since all analog inputs are
shared with a digital port pin as well.
Enable Signal
EXTCLKEN
OSCON
RCOSCEN
OSC32EN
TOSKON
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
3. The clock configuration is programmed by fuses. As a fuse is not changed run-time, the clock
Previous
From
Cell
the Internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
configuration is considered fixed for a given application. The user is advised to scan the same
clock option as to be used in the final system. The enable signals are supported in the scan
chain because the system logic can disable clock options in sleep modes, thereby disconnect-
ing the Oscillator pins from the scan path if not provided. The INTCAP Fuses are not
supported in the scan-chain, so the boundary scan chain can not make a XTAL Oscillator
requiring internal capacitors to run unless the fuse is correctly programmed.
ShiftDR
summaries the scan registers for the external clock pin XTAL1, Oscillators with
Table
0
1
ClockDR
Scan Signals for the Oscillators
Scanned Clock Line
EXTCLK (XTAL1)
OSCCK
RCCK
OSC32CK
TOSCK
24-5.
D
UpdateDR
Q
Next
Cell
To
Figure 24-9
D
G
Q
EXTEST
0
1
is attached to each of these signals. The signals are
XTAL1/TOSC1
ENABLE
Clock Option
External Clock
External Crystal
External Ceramic Resonator
External RC
Low Freq. External Crystal
32 kHz Timer Oscillator
(1)(2)(3)
Oscillator
XTAL2/TOSC2
OUTPUT
Previous
From
Cell
ShiftDR
0
1
ATmega16A
ClockDR
Scanned Clock Line
when not Used
Figure
D
FF1
Q
Next
Cell
To
0
0
1
0
0
24-8. The
239