ATMEGA8515-16MU Atmel, ATMEGA8515-16MU Datasheet - Page 80

• Manufacturer Part Number: ATMEGA8515-16MU
• Description: IC AVR MCU 8K 16MHZ 5V 44-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8515-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

8-bit Timer/Counter0
with PWM
Overview
Registers
80
ATmega8515(L)
Timer/Counter0 is a general purpose, single channel, 8-bit Timer/Counter module. The
main features are:
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A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 34. For the
actual placement of I/O pins, refer to “Pinout ATmega8515” on page 2. CPU accessible
I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O
Register and bit locations are listed in the “8-bit Timer/Counter Register Description” on
page 91.
Figure 34. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers.
Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer
Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure since
these registers are shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock
source on the T0 pin. The Clock Select logic block controls which clock source and edge
the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is
Single Channel Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)
Timer/Counter
TCNTn
OCRn
=
direction
count
clear
BOTTOM
= 0
Control Logic
TCCRn
=
TOP
0xFF
clk
Tn
Generation
Waveform
Clock Select
( From Prescaler )
Detector
Edge
2512K–AVR–01/10
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn