PIC18F1330-I/SO Microchip Technology, PIC18F1330-I/SO Datasheet - Page 183

• Manufacturer Part Number: PIC18F1330-I/SO
• Description: IC PIC MCU FLASH 4KX16 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1330-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Package: 18SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

18.2
The following steps are needed to set up the LVD
module:
1.
2.
3.
4.
5.
18.3
When the module is enabled, the LVD comparator and
voltage divider are enabled and will consume static cur-
rent. The total current consumption, when enabled, is
specified in electrical specification parameter D022B.
FIGURE 18-2:
© 2007 Microchip Technology Inc.
Disable the module by clearing the LVDEN bit
(LVDCON<4>).
Write the value to the LVDL3:LVDL0 bits that
selects the desired LVD trip point.
Enable the LVD module by setting the LVDEN
bit.
Clear the LVD interrupt flag (PIR2<2>) which
may have been set from a previous interrupt.
Enable the LVD interrupt, if interrupts are
desired, by setting the LVDIE and GIE bits
(PIE2<2> and INTCON<7>). An interrupt will not
be generated until the IRVST bit is set.
CASE 1:
CASE 2:
LVD Setup
Current Consumption
Enable LVD
Enable LVD
IRVST
IRVST
LVDIF
LVDIF
V
V
DD
DD
LOW-VOLTAGE DETECT OPERATION
Internal reference is stable
Advance Information
Internal reference is stable
T
T
IRVST
IRVST
LVDIF may not be set
LVDIF cleared in software,
LVDIF remains set since LVD condition still exists
Depending on the application, the LVD module does
not need to be operating constantly. To decrease the
current requirements, the LVD circuitry may only need
to be enabled for short periods where the voltage is
checked. After doing the check, the LVD module may
be disabled.
18.4
The internal reference voltage of the LVD module,
specified in electrical specification parameter D420,
may be used by other internal circuitry, such as the
programmable Brown-out Reset. If the LVD or other
circuits using the voltage reference are disabled to
lower the device’s current consumption, the reference
voltage circuit will require time to become stable before
a low-voltage condition can be reliably detected. This
start-up time, T
of device clock speed. It is specified in electrical
specification parameter 36.
The LVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval (refer to Figure 18-2).
LVD Start-up Time
PIC18F1230/1330
IRVST
LVDIF cleared in software
, is an interval that is independent
LVDIF cleared in software
V
DS39758C-page 181
V
LVD
LVD
IRVST
has