PIC18F1330-I/SO Microchip Technology, PIC18F1330-I/SO Datasheet - Page 307

• Manufacturer Part Number: PIC18F1330-I/SO
• Description: IC PIC MCU FLASH 4KX16 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1330-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 18-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Package: 18SOIC W
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SUBWF ............................................................................ 243
SUBWFB .......................................................................... 244
SWAPF ............................................................................ 244
T
Table Reads/Table Writes ................................................. 48
TBLRD ............................................................................. 245
TBLWT ............................................................................. 246
Time-out in Various Situations (table) ................................ 37
Timer0 .............................................................................. 101
Timer1 .............................................................................. 105
Timing Diagrams
© 2007 Microchip Technology Inc.
16-Bit Mode Timer Reads and Writes ...................... 103
Associated Registers ............................................... 103
Clock Source Edge Select (T0SE Bit) ...................... 103
Clock Source Select (T0CS Bit) ............................... 103
Interrupt .................................................................... 103
Operation ................................................................. 103
Prescaler .................................................................. 103
Prescaler Assignment (PSA Bit) .............................. 103
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 103
Prescaler. See Prescaler, Timer0.
16-Bit Read/Write Mode ........................................... 108
Associated Registers ............................................... 109
Interrupt .................................................................... 108
Operation ................................................................. 106
Oscillator .......................................................... 105, 107
Oscillator Layout Considerations ............................. 107
Overflow Interrupt .................................................... 105
TMR1H Register ...................................................... 105
TMR1L Register ....................................................... 105
Use as a Clock Source ............................................ 107
Use as a Real-Time Clock ....................................... 108
A/D Conversion ........................................................ 285
Asynchronous Reception ......................................... 154
Asynchronous Transmission .................................... 152
Asynchronous Transmission
Automatic Baud Rate Calculation ............................ 150
Auto-Wake-up Bit (WUE) During
Auto-Wake-up Bit (WUE) During Sleep ................... 155
BRG Overflow Sequence ......................................... 150
Brown-out Reset (BOR) ........................................... 281
CLKO and I/O .......................................................... 280
Clock/Instruction Cycle .............................................. 49
Dead-Time Insertion for
Duty Cycle Update Times in Continuous
Duty Cycle Update Times in Continuous
Edge-Aligned PWM .................................................. 126
EUSART Synchronous Receive
EUSART Synchronous Transmission
External Clock (All Modes Except PLL) ................... 278
Fail-Safe Clock Monitor ............................................ 198
Low-Voltage Detect Characteristics ......................... 275
Low-Voltage Detect Operation ................................. 181
Override Bits in Complementary Mode .................... 133
PWM Output Override Example #1 .......................... 135
PWM Output Override Example #2 .......................... 135
Switching the Assignment ................................ 103
(Back-to-Back) ................................................. 152
Normal Operation ............................................ 155
Complementary PWM ...................................... 129
Up/Down Count Mode ..................................... 126
Up/Down Count Mode with Double Updates ... 127
(Master/Slave) ................................................. 283
(Master/Slave) ................................................. 283
Advance Information
Timing Diagrams and Specifications ............................... 278
Top-of-Stack Access .......................................................... 46
TSTFSZ ........................................................................... 247
Two-Speed Start-up ................................................. 183, 196
Two-Word Instructions
TXSTA Register
PWM Period Buffer Updates in Continuous
PWM Period Buffer Updates in
PWM Time Base Interrupt
PWM Time Base Interrupt (Single-Shot Mode) ....... 121
PWM Time Base Interrupts (Continuous
PWM Time Base Interrupts (Continuous
Reset, Watchdog Timer (WDT), Oscillator Start-up
Send Break Character Sequence ............................ 156
Slow Rise Time (MCLR Tied to V
Start of Center-Aligned PWM .................................. 127
Synchronous Reception
Synchronous Transmission ..................................... 157
Synchronous Transmission (Through TXEN) .......... 158
Time-out Sequence on POR w/PLL Enabled
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer0 and Timer1 External Clock .......................... 282
Transition for Entry to Idle Mode ............................... 30
Transition for Entry to SEC_RUN Mode .................... 27
Transition for Entry to Sleep Mode ............................ 29
Transition for Two-Speed Start-up
Transition for Wake From Idle to Run Mode .............. 30
Transition for Wake From Sleep (HSPLL) ................. 29
Transition from RC_RUN Mode to
Transition from SEC_RUN Mode to
Transition to RC_RUN Mode ..................................... 28
CLKO and I/O Requirements ................................... 280
EUSART Synchronous Receive
EUSART Synchronous Transmission
External Clock Requirements .................................. 278
PLL Clock ................................................................ 279
Reset, Watchdog Timer, Oscillator Start-up
Timer0 and Timer1 External Clock
Example Cases ......................................................... 50
BRGH Bit ................................................................. 145
Up/Down Count Modes ................................... 124
Free-Running Mode ......................................... 124
(Free-Running Mode) ...................................... 120
Up/Down Count Mode with Double Updates) .. 122
Up/Down Count Mode) .................................... 121
Timer (OST), Power-up Timer (PWRT) ........... 281
V
(Master Mode, SREN) ..................................... 159
(MCLR Tied to V
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
(INTOSC to HSPLL) ........................................ 196
PRI_RUN Mode ................................................. 28
PRI_RUN Mode (HSPLL) .................................. 27
Requirements .................................................. 283
Requirements .................................................. 283
Timer, Power-up Timer and Brown-out
Reset Requirements ........................................ 281
Requirements .................................................. 282
PIC18F1230/1330
DD
Rise > T
PWRT
DD
DD
) ............................................ 39
) .......................................... 39
, V
DD
DD
DD
, Case 1) ...................... 38
, Case 2) ...................... 38
Rise < T
DD
DS39758C-page 305
,
PWRT
) ........... 38