PIC18F2331-E/MM Microchip Technology, PIC18F2331-E/MM Datasheet - Page 139

• Manufacturer Part Number: PIC18F2331-E/MM
• Description: IC MCU FLASH 4KX16 28QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2331-E/MM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-QFN
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 768 B
• Data Rom Size: 256 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 5
• Height: 0.88 mm
• Interface Type: EUSART, I2C, SPI, SSP
• Length: 6 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V, 5.8 V
• Supply Voltage (min): 3.9 V, 4.2 V
• Width: 6 mm
• For Use With: I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: PIC18F2331-E/ML; PIC18F2331-E/ML

15.0
The Timer5 module implements these features:
• 16-bit timer/counter operation
• Synchronous and Asynchronous Counter modes
• Continuous Count and Single-Shot Operating modes
• Four programmable prescaler values (1:1 to 1:8)
• Interrupt generated on period match
• Special Event Trigger Reset function
• Double-buffered registers
• Operation during Sleep
• CPU wake-up from Sleep
• Selectable hardware Reset input with a wake-up
REGISTER 15-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1
bit 0
Note 1:
feature
T5SEN
R/W-0
2:
TIMER5 MODULE
These bits are not implemented on PIC18F2331/2431 devices and read as ‘0’.
For Timer5 to operate during Sleep mode, T5SYNC must be set.
T5SEN: Timer5 Sleep Enable bit
1 = Timer5 is enabled during Sleep
0 = Timer5 is disabled during Sleep
RESEN: Special Event Trigger Reset Enable bit
1 = Special Event Trigger Reset is disabled
0 = Special Event Trigger Reset is enabled
T5MOD: Timer5 Mode bit
1 = Single-Shot mode is enabled
0 = Continuous Count mode is enabled
T5PS<1:0>: Timer5 Input Clock Prescale Select bits
11 = 1:8
10 = 1:4
01 = 1:2
00 = 1:1
T5SYNC: Timer5 External Clock Input Synchronization Select bit
When TMR5CS = 1:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR5CS = 0:
This bit is ignored. Timer5 uses the internal clock when TMR5CS = 0.
TMR5CS: Timer5 Clock Source Select bit
1 = External clock from the T5CKI pin
0 = Internal clock (T
TMR5ON: Timer5 On bit
1 = Timer5 is enabled
0 = Timer5 is disabled
RESEN
R/W-0
T5CON: TIMER5 CONTROL REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
T5MOD
R/W-0
CY
)
PIC18F2331/2431/4331/4431
T5PS1
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
T5PS0
R/W-0
Timer5 is a general purpose timer/counter that incor-
porates additional features for use with the Motion
Feedback Module (see
back
purpose timer or a Special Event Trigger delay timer.
When used as a general purpose timer, it can be
configured to generate a delayed Special Event Trigger
(e.g., an ADC Special Event Trigger) using a
preprogrammed period delay.
Timer5 is controlled through the Timer5 Control register
(T5CON), shown in
enabled or disabled by setting or clearing the control bit
TMR5ON (T5CON<0>).
A block diagram of Timer5 is shown in
(1)
Module”). It may also be used as a general
T5SYNC
R/W-0
(2)
(2)
Register
Section 17.0 “Motion Feed-
x = Bit is unknown
TMR5CS
R/W-0
15-1. The timer can be
DS39616D-page 139
Figure
TMR5ON
R/W-0
15-1.
bit 0