PIC18F2331-E/MM Microchip Technology, PIC18F2331-E/MM Datasheet - Page 140

IC MCU FLASH 4KX16 28QFN

PIC18F2331-E/MM

Manufacturer Part Number
PIC18F2331-E/MM
Description
IC MCU FLASH 4KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2331-E/MM

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
768 B
Data Rom Size
256 B
On-chip Adc
Yes
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
5
Height
0.88 mm
Interface Type
EUSART, I2C, SPI, SSP
Length
6 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V, 5.8 V
Supply Voltage (min)
3.9 V, 4.2 V
Width
6 mm
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
PIC18F2331-E/ML
PIC18F2331-E/ML
PIC18F2331/2431/4331/4431
FIGURE 15-1:
15.1
Timer5 combines two 8-bit registers to function as a
16-bit timer. The TMR5L register is the actual low byte
of the timer; it can be read and written to directly. The
high byte is contained in an unmapped register; it is
read and written to through TMR5H, which serves as
a buffer. Each register increments from 00h to FFh.
A second register pair, PR5H and PR5L, serves as the
Period register; it sets the maximum count for the
TMR5 register pair. When TMR5 reaches the value of
PR5, the timer rolls over to 00h and sets the TMR5IF
interrupt flag. A simplified block diagram of the Timer5
module is shown in Figure 2-1.
DS39616D-page 140
Note:
T5CKI
Special Event
Trigger Input
from IC1
Timer5 Reset
(external)
Set TMR5IF
Special Event
Trigger Output
TMR5CS
T5PS<1:0>
T5SYNC
TMR5ON
Timer5 Operation
Capture or Quadrature Encoder Interface).
The Timer5 may be used as a general pur-
pose timer and as the time base resource to
the
Motion
TIMER5 BLOCK DIAGRAM (16-BIT READ/WRITE MODE SHOWN)
Noise
Filter
1
0
Feedback
Clock
Internal
F
OSC
/4
Module
Reset
Special
Logic
1
0
Event
Logic
Timer5 Reset
(Input
Prescaler
1, 2, 4, 8
2
TMR5
PR5
TMR5L
PR5L
Timer5 supports three configurations:
• 16-Bit Synchronous Timer
• 16-Bit Synchronous Counter
• 16-Bit Asynchronous Counter
In Synchronous Timer configuration, the timer is
clocked by the internal device clock. The optional
Timer5 prescaler divides the input by 2, 4, 8 or not at all
(1:1). The TMR5 register pair increments on Q1.
Clearing TMR5CS (= 0) selects the internal device
clock as the timer sampling clock.
Synchronize
Sleep Input
Comparator
Detect
16
16
High Byte
TMR5H
TMR5
PR5H
8
1
0
8
Write TMR5L
Read TMR5L
 2010 Microchip Technology Inc.
8
8
8
8
Timer5
On/Off
Internal Data Bus

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