PIC18F2331-E/MM Microchip Technology, PIC18F2331-E/MM Datasheet - Page 261

IC MCU FLASH 4KX16 28QFN

PIC18F2331-E/MM

Manufacturer Part Number
PIC18F2331-E/MM
Description
IC MCU FLASH 4KX16 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2331-E/MM

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Core
PIC
Processor Series
PIC18F
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Data Ram Size
768 B
Data Rom Size
256 B
On-chip Adc
Yes
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
5
Height
0.88 mm
Interface Type
EUSART, I2C, SPI, SSP
Length
6 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V, 5.8 V
Supply Voltage (min)
3.9 V, 4.2 V
Width
6 mm
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
PIC18F2331-E/ML
PIC18F2331-E/ML
22.5
When enabled, the LVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the LVDIF bit will be set and the device will wake-
up from Sleep. Device execution will continue from the
interrupt vector address if interrupts have been globally
enabled.
22.6
A device Reset forces all registers to their Reset state.
This forces the LVD module to be turned off.
FIGURE 22-3:
TABLE 22-1:
 2010 Microchip Technology Inc.
LVDCON
INTCON
IPR2
PIR2
PIE2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the LVD module.
Name
Operation During Sleep
Effects of a Reset
GIE/GIEH
V
V
OSCFIP
OSCFIF
OSCFIE
A
B
Bit 7
REGISTERS ASSOCIATED WITH LOW-VOLTAGE DETECT MODULE
TYPICAL LOW-VOLTAGE DETECT APPLICATION
PEIE/GIEL
Bit 6
Time
TMR0IE
IRVST
T
Bit 5
A
PIC18F2331/2431/4331/4431
T
B
LVDEN
INT0IE
EEIP
EEIE
Bit 4
EEIF
22.7
Figure 22-3
(typically for batteries). Over time, the device voltage
decreases. When the device voltage equals voltage,
V
time, T
until the device voltage is no longer in valid operating
range, to perform “housekeeping tasks” and to shut
down the system. Voltage point, V
valid operating voltage specification. This occurs at
time, T
shutdown.
A
LVDL3
, the LVD logic generates an interrupt. This occurs at
RBIE
Bit 3
A
B
Legend:
. The application software then has the time,
. The difference, T
Applications
shows a possible application voltage curve
TMR0IF
LVDL2
LVDIP
LVDIF
LVDIE
Bit 2
V
V
A
B
= LVD trip point
= Minimum valid device
operating voltage
B
LVDL1
INT0IF
– T
Bit 1
A
, is the total time for
DS39616D-page 261
B
, is the minimum
CCP2IP
CCP2IE
CCP2IF
LVDL0
RBIF
Bit 0

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