DSPIC33FJ12MC202-I/SP Microchip Technology, DSPIC33FJ12MC202-I/SP Datasheet - Page 105
![IC DSPIC MCU/DSP 12K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ12MC202-I/SP
Manufacturer Part Number
DSPIC33FJ12MC202-I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC24HJ12GP201-ISO PDF datasheet
- DSPIC33FJ12MC201-ISO PDF datasheet #2
- DSPIC33FJ12MC201-ISO PDF datasheet #3
- DSPIC33FJ12MC202-IML PDF datasheet #4
- Current page: 105 of 288
- Download datasheet (5Mb)
REGISTER 8-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
CLKLOCK
Note 1: Writes to this register require an unlock sequence. Refer to Section 7. “Oscillator” (DS70227) in the
R/W-0
U-0
—
2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
“PIC24H Family Reference Manual” (available from the Microchip web site) for details.
This applies to clock switches in either direction. In these instances, the application must switch to FRC mode
as a transition clock source between the two PLL modes.
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Selection bits (read-only)
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator (FRC) with PLL
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator (XT, HS, EC) with PLL
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = Fast RC oscillator (FRC) with Divide-by-16
111 = Fast RC oscillator (FRC) with Divide-by-n
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Selection bits
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator (FRC) with PLL
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator (XT, HS, EC) with PLL
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = Fast RC oscillator (FRC) with Divide-by-16
111 = Fast RC oscillator (FRC) with Divide-by-n
CLKLOCK: Clock Lock Enable bit
If clock switching is enabled and FSCM is disabled, (FOSC<FCKSM> = 0b01)
1 = Clock switching is disabled, system clock source is locked
0 = Clock switching is enabled, system clock source can be modified by clock switching
IOLOCK: Peripheral Pin Select Lock bit
1 = Peripherial pin select is locked, write to peripheral pin select registers not allowed
0 = Peripherial pin select is not locked, write to peripheral pin select registers allowed
LOCK: PLL Lock Status bit (read-only)
1 = Indicates that PLL is in lock, or PLL start-up timer is satisfied
0 = Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
Unimplemented: Read as ‘0’
CF: Clock Fail Detect bit (read/clear by application)
1 = FSCM has detected clock failure
0 = FSCM has not detected clock failure
IOLOCK
R/W-0
R-0
OSCCON: OSCILLATOR CONTROL REGISTER
COSC<2:0>
y = Value set from Configuration bits on POR
W = Writable bit
‘1’ = Bit is set
LOCK
R-0
R-0
R-0
U-0
Preliminary
—
dsPIC33FJ12MC201/202
‘0’ = Bit is cleared
(2)
U = Unimplemented bit, read as ‘0’
R/C-0
U-0
CF
—
R/W-y
(1)
U-0
—
NOSC<2:0>
x = Bit is unknown
LPOSCEN
R/W-y
R/W-0
DS70265D-page 103
(2)
OSWEN
R/W-y
R/W-0
bit 8
bit 0
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