DSPIC33FJ12MC202-I/SP Microchip Technology, DSPIC33FJ12MC202-I/SP Datasheet - Page 245
![IC DSPIC MCU/DSP 12K 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ12MC202-I/SP
Manufacturer Part Number
DSPIC33FJ12MC202-I/SP
Description
IC DSPIC MCU/DSP 12K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.DSPIC33FJ12MC201-ISO.pdf
(288 pages)
3.DSPIC33FJ12MC201-ISO.pdf
(14 pages)
4.DSPIC33FJ12MC202-IML.pdf
(282 pages)
Specifications of DSPIC33FJ12MC202-I/SP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164337 - MODULE SOCKET FOR PM3 40DIPDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC24HJ12GP201-ISO PDF datasheet
- DSPIC33FJ12MC201-ISO PDF datasheet #2
- DSPIC33FJ12MC201-ISO PDF datasheet #3
- DSPIC33FJ12MC202-IML PDF datasheet #4
- Current page: 245 of 288
- Download datasheet (5Mb)
TABLE 24-31: QEI INDEX PULSE TIMING REQUIREMENTS
FIGURE 24-14:
© 2009 Microchip Technology Inc.
AC CHARACTERISTICS
TQ50
TQ51
TQ55
Note 1:
Param
No.
Note: Refer to Figure 24-1 for load conditions.
(CKP = 0)
(CKP = 1)
SDIx
SCKx
SCKx
SDOx
2:
TqIL
TqiH
Tqidxr
Symbol
These parameters are characterized by similarity, but are not tested in manufacturing.
Alignment of index pulses to QEA and QEB is shown for position counter Reset timing only. Shown for
forward direction only (QEA leads QEB). Same timing applies for reverse direction (QEA lags QEB) but
index pulse recognition occurs on falling edge.
Filter Time to Recognize Low,
with Digital Filter
Filter Time to Recognize High,
with Digital Filter
Index Pulse Recognized to Position
Counter Reset (ungated index)
SPIx MODULE MASTER MODE (CKE = 0) TIMING CHARACTERISTICS
SP35
SP31
SP11
Characteristic
SP40 SP41
MSb In
MSb
SP10
(1)
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature
Preliminary
dsPIC33FJ12MC201/202
Bit 14 - - - -1
Bit 14 - - - - - -1
3 * N * T
3 * N * T
3 T
Min
CY
SP21
SP20
CY
CY
-40°C ≤ T
-40°C ≤ T
SP30
Max
—
—
—
SP20
SP21
LSb In
LSb
A
A
≤ +125°C for Extended
≤ +85°C for Industrial
Units
ns
ns
ns
N = 1, 2, 4, 16, 32, 64,
128 and 256 (Note 2)
N = 1, 2, 4, 16, 32, 64,
128 and 256 (Note 2)
DS70265D-page 243
Conditions
—
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