AT32UC3L064-AUT Atmel, AT32UC3L064-AUT Datasheet - Page 63
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AT32UC3L064-AUT
Manufacturer Part Number
AT32UC3L064-AUT
Description
MCU AVR32 64KB FLASH 48TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets
1.ATAVRONE-PROBECBL.pdf
(16 pages)
2.AT32UC3L-EK.pdf
(858 pages)
3.AT32UC3L016-D3HT.pdf
(110 pages)
Specifications of AT32UC3L064-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
48TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
50 MHz
Operating Supply Voltage
1.8|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3L064-AUT
Manufacturer:
HONGFA
Quantity:
30 000
Part Number:
AT32UC3L064-AUT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
7.10
7.10.1
Table 7-36.
Note:
7.10.2
Table 7-37.
Note:
32099F–11/2010
Parameter
Startup time from power-up, using
regulator
Startup time from power-up, no
regulator
Startup time from reset release
Wake-up
Wake-up from shutdown
Symbol
t
RESET
Timing Characteristics
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
Startup, Reset, and Wake-up Timing
RESET_N Timing
cess technology. These values are not covered by test limits in production.
cess technology. These values are not covered by test limits in production.
Maximum Reset and Wake-up Timing
RESET_N Waveform Parameters
Parameter
RESET_N minimum pulse length
Idle
Frozen
Standby
Stop
Deepstop
Static
The startup, reset, and wake-up timings are calculated using the following formula:
Where
another clock source than RCSYS is selected as CPU clock the startup time of the oscillator,
Please refer to the source for the CPU clock in the
more details about oscillator startup times.
t
t
OSCSTART
=
t
CONST
t
CONST
Time from VDDIN crossing the V
POR33 to the first instruction entering the decode
stage of CPU. VDDCORE is supplied by the internal
regulator.
Time from VDDIN crossing the V
POR33 to the first instruction entering the decode
stage of CPU. VDDCORE is connected to VDDIN.
Time from releasing a reset source (except POR18,
POR33, and SM33) to the first instruction entering
the decode stage of CPU.
From wake-up event to the first instruction of an
interrupt routine entering the decode stage of the
CPU.
From wake-up event to the first instruction entering
the decode stage of the CPU.
Measuring
, must added to the wake-up time in the stop, deepstop, and static sleep modes.
+
N
and
CPU
×
N
(1)
CPU
t
CPU
(1)
are found in
Conditions
POT+
POT+
Table
threshold of
threshold of
7-36.
”Oscillator Characteristics” on page 50
t
CPU
AT32UC3L016/32/64
Min
10
Max
is the period of the CPU clock. If
27 +
27 +
97 +
t
CONST
t
t
t
2210
1810
1180
OSCSTART
OSCSTART
OSCSTART
170
0
0
0
Max
(in µs)
Units
ns
Max
110
110
116
116
116
N
19
0
0
0
0
CPU
for
63