AT89C5130A-RDRUM Atmel, AT89C5130A-RDRUM Datasheet - Page 39

• Manufacturer Part Number: AT89C5130A-RDRUM
• Description: MCU 8051 16K FLASH USB 64-VQFP
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5130A-RDRUM

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -

9.4
9.4.1
9.4.1.1
9.4.1.2
4337K–USB–04/08
Flash Registers and Memory Map
Hardware Registers
Bootloader Jump Bit (BLJB)
Flash Memory Lock Bits
The AT89C5130A/31A-M Flash memory uses several registers:
The only hardware register of the AT89C5130A/31A-M is called Hardware Security Byte (HSB).
One bit of the HSB, the BLJB bit, is used to force the boot address:
The three lock bits provide different levels of protection for the on-chip code and data, when pro-
grammed as shown in Table 9-2.
• Hardware register can be accessed with a parallel programmer.Some bits of the hardware
• Software registers are in a special page of the Flash memory which can be accessed through
• When this bit is set the boot address is 0000h.
• When this bit is reset the boot address is F400h. By default, this bit is cleared and the ISP is
register can be changed, also, by API (i.e. X2 and BLJB bits of Hardware security Byte) or
ISP.
the API or with the parallel programming modes. This page, called “Extra Flash Memory”, is
not in the internal Flash program memory addressing space.
enabled.
Table 9-1.
X2
7
Number
5-4
2-0
Bit
7
6
3
BLJB
Hardware Security Byte (HSB)
OSCON1-0
Mnemonic Description
6
LB2-0
BLJB
Bit
X2
-
OSCON1
X2 Mode
Cleared to force X2 mode (6 clocks per instruction)
Set to force X1 mode, Standard Mode (Default).
Bootloader Jump Bit
Set this bit to start the user’s application on next reset at address 0000h.
Cleared this bit to start the bootloader at address F400h (default).
Oscillator Control Bits
These two bits are used to control the oscillator in order to reduce consumption.
OSCON1 OSCON0 Description
1
1
0
0
Reserved
User Memory Lock Bits
See Table 9-2
5
1 The oscillator is configured to run from 0 to 32 MHz
0 The oscillator is configured to run from 0 to 16 MHz
1 The oscillator is configured to run from 0 to 8 MHz
0 This configuration shouldn’t be set
OSCON0
4
3
-
AT89C5130A/31A-M
LB2
2
LB1
1
LB0
0
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