DSPIC33FJ64GS606-E/MR Microchip Technology, DSPIC33FJ64GS606-E/MR Datasheet - Page 23
![MCU/DSP 16BIT 64KB FLASH 64QFN](/photos/12/13/121325/c04-149_mr_sml.jpg)
DSPIC33FJ64GS606-E/MR
Manufacturer Part Number
DSPIC33FJ64GS606-E/MR
Description
MCU/DSP 16BIT 64KB FLASH 64QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ32GS406-IPT.pdf
(418 pages)
Specifications of DSPIC33FJ64GS606-E/MR
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-VFQFN, Exposed Pad
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
Number Of I /o
58
Ram Size
9K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Numeric And Arithmetic Format
Fixed-Point or Floating-Point
Instruction Set Architecture
Harvard
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
58
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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TABLE 1-1:
2010 Microchip Technology Inc.
FLT1-FLT23
SYNCI1-SYNCI4
SYNCO1-SYNCO2
PWM1L
PWM1H
PWM2L
PWM2H
PWM3L
PWM3H
PWM4L
PWM4H
PWM5L
PWM5H
PWM6L
PWM6H
PWM7L
PWM7H
PWM8L
PWM8H
PWM9L
PWM9H
PGED1
PGEC1
PGED2
PGEC2
PGED3
PGEC3
MCLR
AV
AV
V
V
V
Legend: CMOS = CMOS compatible input or output
DD
CAP
SS
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DD
SS
/V
Pin Name
DDCORE
ST = Schmitt Trigger input with CMOS levels
TTL = Transistor-Transistor Logic
PINOUT I/O DESCRIPTIONS (CONTINUED)
Type
Pin
I/O
I/O
I/O
I/P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
P
P
P
P
P
I
I
I
I
I
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
P
P
Fault Inputs to PWM Module
External synchronization signal to PWM Master Time Base
PWM Master Time Base for external device synchronization
PWM1 Low output
PWM1 High output
PWM2 Low output
PWM2 High output
PWM3 Low output
PWM3 High output
PWM4 Low output
PWM4 High output
PWM5 Low output
PWM5 High output
PWM6 Low output
PWM6 High output
PWM7 Low output
PWM7 High output
PWM8 Low output
PWM8 High output
PWM9 Low output
PWM9 High output
Data I/O pin for programming/debugging communication Channel 1
Clock input pin for programming/debugging communication Channel 1
Data I/O pin for programming/debugging communication Channel 2
Clock input pin for programming/debugging communication Channel 2
Data I/O pin for programming/debugging communication Channel 3
Clock input pin for programming/debugging communication Channel 3
Master Clear (Reset) input. This pin is an active-low Reset to the
device.
Positive supply for analog modules
Ground reference for analog modules
Positive supply for peripheral logic and I/O pins
CPU logic filter capacitor connection
Ground reference for logic and I/O pins
Preliminary
Analog = Analog input
P = Power
Description
I = Input
O = Output
DS70591C-page 23
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