DSPIC33FJ64GS606-E/MR Microchip Technology, DSPIC33FJ64GS606-E/MR Datasheet - Page 282
![MCU/DSP 16BIT 64KB FLASH 64QFN](/photos/12/13/121325/c04-149_mr_sml.jpg)
DSPIC33FJ64GS606-E/MR
Manufacturer Part Number
DSPIC33FJ64GS606-E/MR
Description
MCU/DSP 16BIT 64KB FLASH 64QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ32GS406-IPT.pdf
(418 pages)
Specifications of DSPIC33FJ64GS606-E/MR
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-VFQFN, Exposed Pad
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
Number Of I /o
58
Ram Size
9K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Numeric And Arithmetic Format
Fixed-Point or Floating-Point
Instruction Set Architecture
Harvard
Device Million Instructions Per Second
40 MIPs
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
58
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
On-chip Dac
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 282 of 418
- Download datasheet (3Mb)
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 21-1:
DS70591C-page 282
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12
bit 11
bit 10-8
bit 7-5
bit 4
bit 3
bit 2-1
bit 0
U-0
R-1
—
OPMODE<2:0>
Unimplemented: Read as ‘0’
CSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
ABAT: Abort All Pending Transmissions bit
1 = Signal all transmit buffers to abort transmission
0 = Module will clear this bit when all transmissions are aborted
Reserved: Do not use
REQOP<2:0>: Request Operation Mode bits
000 = Set Normal Operation mode
001 = Set Disable mode
010 = Set Loopback mode
011 = Set Listen Only Mode
100 = Set Configuration mode
101 = Reserved
110 = Reserved
111 = Set Listen All Messages mode
OPMODE<2:0>: Operation Mode bits
000 = Module is in Normal Operation mode
001 = Module is in Disable mode
010 = Module is in Loopback mode
011 = Module is in Listen Only mode
100 = Module is in Configuration mode
101 = Reserved
110 = Reserved
111 = Module is in Listen All Messages mode
Unimplemented: Read as ‘0’
CANCAP: CAN Message Receive Timer Capture Event Enable bit
1 = Enable input capture based on CAN message receive
0 = Disable CAN capture
Unimplemented: Read as ‘0’
WIN: SFR Map Window Select bit
1 = Use filter window
0 = Use buffer window
U-0
R-0
—
CiCTRL1: ECAN™ CONTROL REGISTER 1
C = Writable bit, but only ‘0’ can be written to clear the bit r = Bit is Reserved
W = Writable bit
‘1’ = Bit is set
CSIDL
R/W-0
R-0
R/W-0
ABAT
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CANCAP
R/W-0
r-0
—
R/W-1
U-0
—
2010 Microchip Technology Inc.
REQOP<2:0>
x = Bit is unknown
R/W-0
U-0
—
R/W-0
R/W-0
WIN
bit 8
bit 0
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