PIC24FJ256GA108-E/PT Microchip Technology, PIC24FJ256GA108-E/PT Datasheet - Page 168
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PIC24FJ256GA108-E/PT
Manufacturer Part Number
PIC24FJ256GA108-E/PT
Description
IC PIC MCU FLASH 256KB 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ128GA110-EPT.pdf
(310 pages)
Specifications of PIC24FJ256GA108-E/PT
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCU
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GA108-E/PT
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC24FJ256GA108-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA008-IPT PDF datasheet
- PIC24FJ128GA106-IPT PDF datasheet #2
- PIC24FJ128GA106-IPT PDF datasheet #3
- PIC24FJ128GA106-IPT PDF datasheet #4
- PIC24FJ128GA110-EPT PDF datasheet #5
- Current page: 168 of 330
- Download datasheet (3Mb)
PIC24FJ256GA110 FAMILY
14.2
In Compare mode
compare module can be configured for single-shot or
continuous pulse generation; it can also repeatedly
toggle an output pin on each timer event.
To set up the module for compare operations:
1.
2.
FIGURE 14-1:
DS39905E-page 168
Trigger and
Sync Sources
OC Clock
Sources
Configure the OCx output for one of the
available Peripheral Pin Select pins.
Calculate the required values for the OCxR and
(for Double Compare modes) OCxRS duty cycle
registers:
a)
b)
c)
Note 1: The OCx outputs must be assigned to an available RPn pin before use. Please see
Compare Operations
Determine the instruction clock cycle time.
Take into account the frequency of the
external clock to the timer source (if one is
used) and the timer prescaler settings.
Calculate time to the rising edge of the out-
put pulse relative to the timer start value
(0000h).
Calculate the time to the falling edge of the
pulse based on the desired pulse width and
the time to the rising edge of the pulse.
TRIGMODE
SYNCSELx
TRIGSTAT
OCTSELx
Pin Select”
OCTRIG
(Figure
Trigger and
Sync Logic
OUTPUT COMPARE BLOCK DIAGRAM (16-BIT MODE)
Clock
Select
14-1), the enhanced output
for more information.
Match Event
Reset
Increment
Reset
Comparator
Comparator
OCxCON1
OCxCON2
OCxTMR
OCxRS
OCxR
3.
4.
5.
6.
7.
8.
Match Event
Match Event
Write the rising edge value to OCxR, and the
falling edge value to OCxRS.
Set the Timer Period register, PRy, to a value
equal to or greater than the value in OCxRS.
Set the OCM<2:0> bits for the appropriate
compare operation (= 0xx).
For Trigger mode operations, set OCTRIG to
enable Trigger mode. Set or clear TRIGMODE to
configure trigger operation, and TRIGSTAT to
select a hardware or software trigger. For
Synchronous mode, clear OCTRIG.
Set the SYNCSEL<4:0> bits to configure the
trigger or synchronization source. If free-running
timer operation is required, set the SYNCSEL bits
to ‘00000’ (no sync/trigger source).
Select
OCTSEL<2:0> bits. If necessary, set the TON bit
for the selected timer which enables the compare
time base to count. Synchronous mode operation
starts as soon as the time base is enabled; Trigger
mode operation starts after a trigger source event
occurs.
the
OC Output and
Fault Logic
OCx Interrupt
time
OCMx
OCINV
OCTRIS
FLTOUT
FLTTRIEN
FLTMD
ENFLT0
OCFLT0
2010 Microchip Technology Inc.
base
Section 10.4 “Peripheral
source
OCFA/OCFB
OCx Pin
with
(1)
the
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