PIC24FJ256GA108-E/PT Microchip Technology, PIC24FJ256GA108-E/PT Datasheet - Page 46
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PIC24FJ256GA108-E/PT
Manufacturer Part Number
PIC24FJ256GA108-E/PT
Description
IC PIC MCU FLASH 256KB 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ128GA110-EPT.pdf
(310 pages)
Specifications of PIC24FJ256GA108-E/PT
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCU
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GA108-E/PT
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC24FJ256GA108-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC24FJ128GA008-IPT PDF datasheet
- PIC24FJ128GA106-IPT PDF datasheet #2
- PIC24FJ128GA106-IPT PDF datasheet #3
- PIC24FJ128GA106-IPT PDF datasheet #4
- PIC24FJ128GA110-EPT PDF datasheet #5
- Current page: 46 of 330
- Download datasheet (3Mb)
TABLE 4-10:
TABLE 4-11:
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
U2MODE
U2STA
U2TXREG
U2RXREG
U2BRG
U3MODE
U3STA
U3TXREG
U3RXREG
U3BRG
U4MODE
U4STA
U4TXREG
U4RXREG
U4BRG
Legend:
SPI1STAT
SPI1CON1
SPI1CON2
SPI1BUF
SPI2STAT
SPI2CON1
SPI2CON2
SPI2BUF
SPI3STAT
SPI3CON1
SPI3CON2
SPI3BUF
Legend:
Name
Name
File
File
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr
0220
0222
0224
0226
0228
0230
0232
0234
0236
0238
0250
0252
0254
0256
0258
02B0
02B2
02B4
02B6
02B8
Addr
0240
0242
0244
0248
0260
0262
0264
0268
0280
0282
0284
0288
UART REGISTER MAP
SPI REGISTER MAP
UTXISEL1
UTXISEL1
UTXISEL1
UTXISEL1
UARTEN
UARTEN
UARTEN
UARTEN
FRMEN
FRMEN
FRMEN
SPIEN
SPIEN
SPIEN
Bit 15
Bit 15
—
—
—
—
—
—
—
—
—
—
—
SPIFSD
SPIFSD
SPIFSD
UTXINV
UTXINV
UTXINV
UTXINV
Bit 14
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPIFPOL
SPIFPOL
SPIFPOL
SPISIDL
SPISIDL
SPISIDL
UTXISEL0
UTXISEL0
UTXISEL0
UTXISEL0
Bit 13
USIDL
USIDL
USIDL
USIDL
Bit 13
—
—
—
—
—
—
—
—
—
—
—
DISSCK
DISSCK
DISSCK
Bit 12
Bit 12
IREN
IREN
IREN
IREN
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DISSDO MODE16
DISSDO MODE16
DISSDO MODE16
UTXBRK
UTXBRK
UTXBRK
UTXBRK
Bit 11
RTSMD
RTSMD
RTSMD
RTSMD
Bit 11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPIBEC2 SPIBEC1 SPIBEC0
SPIBEC2 SPIBEC1 SPIBEC0
SPIBEC2 SPIBEC1 SPIBEC0
Bit 10
UTXEN
UTXEN
UTXEN
UTXEN
Bit 10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
UTXBF
UTXBF
UTXBF
UTXBF
Bit 9
SMP
SMP
SMP
UEN1
UEN1
UEN1
UEN1
Bit 9
—
—
—
—
—
—
—
—
—
—
—
Baud Rate Generator Prescaler
Baud Rate Generator Prescaler
Baud Rate Generator Prescaler
Baud Rate Generator Prescaler
Transmit and Receive Buffer
Transmit and Receive Buffer
Transmit and Receive Buffer
TRMT
TRMT
TRMT
TRMT
Bit 8
UEN0
UEN0
UEN0
UEN0
CKE
CKE
CKE
Bit 8
—
—
—
URXISEL1 URXISEL0
URXISEL1 URXISEL0
URXISEL1 URXISEL0
URXISEL1 URXISEL0
SRMPT
SRMPT
SRMPT
SSEN
SSEN
SSEN
WAKE
WAKE
WAKE
WAKE
Bit 7
Bit 7
—
—
—
SPIROV SRXMPT
SPIROV SRXMPT
SPIROV SRXMPT
LPBACK
LPBACK
LPBACK
LPBACK
Bit 6
CKP
CKP
CKP
Bit 6
—
—
—
MSTEN
MSTEN
MSTEN
ADDEN
ADDEN
ADDEN
ADDEN
Bit 5
ABAUD
ABAUD
ABAUD
ABAUD
—
—
—
Bit 5
Transmit Register
Transmit Register
Transmit Register
Transmit Register
Receive Register
Receive Register
Receive Register
Receive Register
SISEL2
SISEL2
SISEL2
SPRE2
SPRE2
SPRE2
Bit 4
RXINV
RXINV
RXINV
RXINV
RIDLE
RIDLE
RIDLE
RIDLE
Bit 4
—
—
—
SISEL1
SPRE1
SISEL1
SPRE1
SISEL1
SPRE1
Bit 3
BRGH
PERR
BRGH
PERR
BRGH
PERR
BRGH
PERR
Bit 3
—
—
—
SISEL0
SISEL0
SISEL0
SPRE0
SPRE0
SPRE0
PDSEL1
PDSEL1
PDSEL1
PDSEL1
Bit 2
FERR
FERR
FERR
FERR
Bit 2
—
—
—
SPITBF
SPITBF
SPITBF
PPRE1
PPRE1
PPRE1
PDSEL0
PDSEL0
PDSEL0
PDSEL0
SPIFE
SPIFE
SPIFE
OERR
OERR
OERR
OERR
Bit 1
Bit 1
SPIRBF
SPIBEN
SPIRBF
SPIBEN
SPIRBF
SPIBEN
PPRE0
PPRE0
PPRE0
URXDA
URXDA
URXDA
URXDA
STSEL
STSEL
STSEL
STSEL
Bit 0
Bit 0
Resets
Resets
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0110
xxxx
0000
0000
0000
0110
xxxx
0000
0000
0000
0110
xxxx
0000
0000
0000
0110
xxxx
0000
0000
All
All
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