PIC24FJ256GA108-E/PT Microchip Technology, PIC24FJ256GA108-E/PT Datasheet - Page 323
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PIC24FJ256GA108-E/PT
Manufacturer Part Number
PIC24FJ256GA108-E/PT
Description
IC PIC MCU FLASH 256KB 80-TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ128GA110-EPT.pdf
(310 pages)
Specifications of PIC24FJ256GA108-E/PT
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
69
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCU
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GA108-E/PT
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC24FJ256GA108-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Output Compare
Output Compare with Dedicated Timer ............................ 167
P
Packaging ........................................................................ 305
Parallel Master Port. See PMP. ....................................... 201
Peripheral Enable Bits ..................................................... 126
Peripheral Module Disable Bits ........................................ 126
Peripheral Pin Select (PPS) ............................................. 129
Pinout Descriptions ...................................................... 15–22
PMSLP Bit .......................................................................... 66
PMSLP bit
Power-Saving Features ................................................... 125
Power-up Requirements .................................................. 252
Product Identification System .......................................... 328
Program Memory
Program Space Visibility (PSV) ......................................... 56
Program Verification ........................................................ 253
Programmer’s Model .......................................................... 29
Pulse-Width Modulation (PWM) Mode ............................. 169
Pulse-Width Modulation. See PWM.
PWM
R
Reader Response ............................................................ 327
Register Maps
2010 Microchip Technology Inc.
Cascaded (32-Bit) Mode .......................................... 167
Operations ............................................................... 168
Synchronous and Trigger Modes ............................. 167
Details ...................................................................... 307
Marking .................................................................... 305
Alternate Fixed Pin Mapping .................................... 130
Available Peripherals and Pins ................................ 130
Configuration Control ............................................... 133
Considerations for Use ............................................ 134
Input Mapping .......................................................... 130
Mapping Exceptions ................................................. 133
Output Mapping ....................................................... 130
Peripheral Priority .................................................... 130
and Wake-up Time ................................................... 125
and Wake-up Time ................................................... 252
Modes
Access Using Table Instructions ................................ 55
Address Space ........................................................... 35
Addressing ................................................................. 53
Flash Configuration Words ........................................ 36
Memory Maps ............................................................ 35
Organization ............................................................... 36
Program Space Visibility ............................................ 56
Duty Cycle and Period ............................................. 170
ADC ........................................................................... 49
Comparators .............................................................. 50
CPU Core ................................................................... 39
CRC ........................................................................... 50
CTMU ......................................................................... 49
I
ICN ............................................................................. 40
Input Capture ............................................................. 43
Interrupt Controller ..................................................... 41
NVM ........................................................................... 52
Output Compare ........................................................ 44
Pad Configuration ...................................................... 48
Parallel Master/Slave Port ......................................... 50
2
C .............................................................................. 45
Doze ................................................................ 126
Idle ................................................................... 126
Sleep ................................................................ 125
PIC24FJ256GA110 FAMILY
Registers
Peripheral Pin Select ................................................. 51
PMD ........................................................................... 52
PORTA ...................................................................... 47
PORTB ...................................................................... 47
PORTC ...................................................................... 47
PORTD ...................................................................... 47
PORTE ...................................................................... 48
PORTF ...................................................................... 48
Real-Time Clock and Calendar ................................. 50
SPI ............................................................................. 46
System ....................................................................... 52
Timers ........................................................................ 42
UART ......................................................................... 46
AD1CHS (A/D Input Select) ..................................... 230
AD1CON1 (A/D Control 1) ....................................... 227
AD1CON2 (A/D Control 2) ....................................... 228
AD1CON3 (A/D Control 3) ....................................... 229
AD1CSSL (A/D Input Scan Select Low) .................. 232
AD1PCFGH (A/D Port Configuration High) ............. 231
AD1PCFGL (A/D Port Configuration Low) ............... 231
ALCFGRPT (Alarm Configuration) .......................... 215
ALMINSEC (Alarm Minutes and Seconds Value) .... 219
ALMTHDY (Alarm Month and Day Value) ............... 218
ALTRP (Alternate Peripheral Pin Mapping) ............. 154
ALWDHR (Alarm Weekday and Hours Value) ........ 218
CLKDIV (Clock Divider) ........................................... 119
CMSTAT (Comparator Status) ................................ 238
CMxCON (Comparator x Control) ........................... 237
CORCON (CPU Control) ..................................... 33, 75
CRCCON (CRC Control) ......................................... 223
CRCXOR (CRC XOR Polynomial) .......................... 224
CTMUCON (CTMU Control) .................................... 243
CTMUICON (CTMU Current Control) ...................... 244
CVRCON (Comparator Voltage Reference
CW1 (Flash Configuration Word 1) ......................... 246
CW2 (Flash Configuration Word 2) ......................... 248
CW3 (Flash Configuration Word 3) ......................... 249
DEVID (Device ID) ................................................... 250
DEVREV (Device Revision) ..................................... 250
I2CxCON (I2Cx Control) .......................................... 188
I2CxMSK (I2Cx Slave Mode Address Mask) ........... 192
I2CxSTAT (I2Cx Status) .......................................... 190
ICxCON1 (Input Capture x Control 1) ...................... 165
ICxCON2 (Input Capture x Control 2) ...................... 166
IEC0 (Interrupt Enable Control 0) .............................. 84
IEC1 (Interrupt Enable Control 1) .............................. 85
IEC2 (Interrupt Enable Control 2) .............................. 87
IEC3 (Interrupt Enable Control 3) .............................. 88
IEC4 (Interrupt Enable Control 4) .............................. 89
IEC5 (Interrupt Enable Control 5) .............................. 90
IFS0 (Interrupt Flag Status 0) .................................... 78
IFS1 (Interrupt Flag Status 1) .................................... 79
IFS2 (Interrupt Flag Status 2) .................................... 80
IFS3 (Interrupt Flag Status 3) .................................... 81
IFS4 (Interrupt Flag Status 4) .................................... 82
IFS5 (Interrupt Flag Status 5) .................................... 83
INTCON1 (Interrupt Control 1) .................................. 76
INTCON2 (Interrupt Control 2) .................................. 77
INTTREG (Interrupt Control and Status) ................. 112
IPC0 (Interrupt Priority Control 0) .............................. 91
IPC1 (Interrupt Priority Control 1) .............................. 92
IPC10 (Interrupt Priority Control 10) ........................ 101
IPC11 (Interrupt Priority Control 11) ........................ 102
Control) ............................................................ 240
DS39905E-page 323