PIC18F4525-E/ML Microchip Technology, PIC18F4525-E/ML Datasheet - Page 145
![IC MCU FLASH 24KX16 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F4525-E/ML
Manufacturer Part Number
PIC18F4525-E/ML
Description
IC MCU FLASH 24KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2525-ISO.pdf
(412 pages)
3.PIC18F2525-ISO.pdf
(18 pages)
4.PIC18F2525-ISO.pdf
(18 pages)
5.PIC18F2525-ISO.pdf
(6 pages)
6.PIC18F2525-ISO.pdf
(6 pages)
Specifications of PIC18F4525-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3986 B
Interface Type
SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, 53275-917, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
For Use With
I3DB18F4620 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F2221-ISO PDF datasheet
- PIC18F2525-ISO PDF datasheet #2
- PIC18F2525-ISO PDF datasheet #3
- PIC18F2525-ISO PDF datasheet #4
- PIC18F2525-ISO PDF datasheet #5
- PIC18F2525-ISO PDF datasheet #6
- Current page: 145 of 412
- Download datasheet (7Mb)
TABLE 15-3:
© 2008 Microchip Technology Inc.
INTCON
RCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISB
TRISC
TMR1L
TMR1H
T1CON
TMR3H
TMR3L
T3CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare, Timer1 or Timer3.
Note 1:
Name
2:
The SBOREN bit is only available when the BOREN1:BOREN0 Configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
These bits are unimplemented on 28-pin devices and read as ‘0’.
PORTB Data Direction Control Register
PORTC Data Direction Control Register
Timer1 Register Low Byte
Timer1 Register High Byte
Timer3 Register High Byte
Timer3 Register Low Byte
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 2 High Byte
GIE/GIEH PEIE/GIEL
PSPIE
PSPIP
PSPIF
OSCFIF
OSCFIE
OSCFIP
P1M1
RD16
RD16
IPEN
Bit 7
—
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, TIMER1 AND TIMER3
(2)
(2)
(2)
(2)
SBOREN
T3CCP2
P1M0
T1RUN
CMIF
CMIE
CMIP
ADIE
ADIP
ADIF
Bit 6
—
(2)
(1)
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC
T3CKPS1 T3CKPS0 T3CCP1
TMR0IE
DC1B1
DC2B1
RCIF
RCIE
RCIP
Bit 5
—
—
—
—
PIC18F2525/2620/4525/4620
DC1B0
DC2B0
INT0IE
EEIE
EEIP
Bit 4
TXIF
TXIE
TXIP
EEIF
RI
CCP1M3
CCP2M3
SSPIF
SSPIE
SSPIP
BCLIE
BCLIP
BCLIF
RBIE
Bit 3
TO
CCP1M2 CCP1M1 CCP1M0
CCP2M2 CCP2M1 CCP2M0
T3SYNC
TMR0IF
CCP1IE
CCP1IP
CCP1IF
HLVDIF
HLVDIE
HLVDIP
Bit 2
PD
TMR1CS TMR1ON
TMR3CS TMR3ON
TMR2IE
TMR2IP
TMR3IE
TMR3IP
TMR2IF
TMR3IF
INT0IF
Bit 1
POR
TMR1IE
TMR1IP
TMR1IF
CCP2IF
CCP2IE
CCP2IP
DS39626E-page 143
RBIF
Bit 0
BOR
on page
Values
Reset
49
48
52
52
52
52
52
52
52
52
50
50
50
51
51
51
51
51
51
51
51
51
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