ATMEGA168-15AZ Atmel, ATMEGA168-15AZ Datasheet - Page 146
![MCU AVR 16K FLASH 15MHZ 32-TQFP](/photos/6/91/69154/313-32-tqfp_sml.jpg)
ATMEGA168-15AZ
Manufacturer Part Number
ATMEGA168-15AZ
Description
MCU AVR 16K FLASH 15MHZ 32-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA168-15AZ.pdf
(340 pages)
Specifications of ATMEGA168-15AZ
Package / Case
32-TQFP, 32-VQFP
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
23
Eeprom Size
512 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
1K x 8
Program Memory Size
16KB (16K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
I²C, SPI, UART/USART
Core Size
8-Bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Interface Type
2-Wire/USART/Serial
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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15.8
15.8.1
146
8-bit Timer/Counter Register Description
ATmega48/88/168 Automotive
Timer/Counter Control Register A – TCCR2A
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2A pin
must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 15-1.
Table 15-2
mode.
Table 15-2.
Note:
Bit
Read/Write
Initial Value
COM2A1
COM2A1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM2A1
R/W
COM2A0
COM2A0
7
0
0
1
0
1
0
1
0
1
Table 15-1
COM2A0
R/W
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC2A on Compare Match
Clear OC2A on Compare Match
Set OC2A on Compare Match
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC0A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match, set OC2A at TOP
Set OC2A on Compare Match, clear OC2A at TOP
shows the COM2A1:0 bit functionality when the WGM22:0 bits
COM2B1
R/W
5
0
COM2B0
R/W
4
0
R
3
–
0
(1)
R
2
–
0
“Fast PWM Mode” on page 141
WGM21
R/W
1
0
WGM20
R/W
0
0
7530I–AVR–02/10
TCCR2A
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