DSPIC33FJ128MC710-E/PT Microchip Technology, DSPIC33FJ128MC710-E/PT Datasheet - Page 161
![IC DSPIC MCU/DSP 128K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ128MC710-E/PT
Manufacturer Part Number
DSPIC33FJ128MC710-E/PT
Description
IC DSPIC MCU/DSP 128K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ128MC710-E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TFQFP
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- DSPIC33FJ12GP201-ISO PDF datasheet
- DSPIC33FJ64MC506-IPT PDF datasheet #2
- DSPIC33FJ64MC506-IPT PDF datasheet #3
- Current page: 161 of 340
- Download datasheet (5Mb)
REGISTER 10-3:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-2
bit 1
bit 0
R/W-0
T9MD
U-0
—
T9MD: Timer9 Module Disable bit
1 = Timer9 module is disabled
0 = Timer9 module is enabled
T8MD: Timer8 Module Disable bit
1 = Timer8 module is disabled
0 = Timer8 module is enabled
T7MD: Timer7 Module Disable bit
1 = Timer7 module is disabled
0 = Timer7 module is enabled
T6MD: Timer6 Module Disable bit
1 = Timer6 module is disabled
0 = Timer6 module is enabled
Unimplemented: Read as ‘0’
I2C2MD: I2C2 Module Disable bit
1 = I2C2 module is disabled
0 = I2C2 module is enabled
AD2MD: AD2 Module Disable bit
1 = AD2 module is disabled
0 = AD2 module is enabled
R/W-0
T8MD
U-0
—
PMD3: PERIPHERAL MODULE DISABLE CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
R/W-0
T7MD
U-0
—
dsPIC33FJXXXMCX06/X08/X10
R/W-0
T6MD
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
U-0
U-0
—
—
x = Bit is unknown
I2C2MD
R/W-0
U-0
—
DS70287C-page 159
AD2MD
R/W-0
U-0
—
bit 8
bit 0
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