DSPIC33FJ128MC710-E/PT Microchip Technology, DSPIC33FJ128MC710-E/PT Datasheet - Page 330
![IC DSPIC MCU/DSP 128K 100TQFP](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ128MC710-E/PT
Manufacturer Part Number
DSPIC33FJ128MC710-E/PT
Description
IC DSPIC MCU/DSP 128K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
2.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ128MC710-E/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TFQFP
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- DSPIC33FJ12GP201-ISO PDF datasheet
- DSPIC33FJ64MC506-IPT PDF datasheet #2
- DSPIC33FJ64MC506-IPT PDF datasheet #3
- Current page: 330 of 340
- Download datasheet (5Mb)
dsPIC33FJXXXMCX06/X08/X10
Revision C (March 2009)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
Global changes include:
• Changed all instances of OSCI to OSC1 and
• Changed all instances of V
The other changes are referenced by their respective
section in the following table.
TABLE A-2:
DS70287C-page 328
“High-Performance, 16-Bit Digital
Signal Controllers”
Section 1.0 “Device Overview”
Section 2.0 “Guidelines for Getting
Started with 16-Bit Digital Signal
Controllers”
Section 4.0 “Memory Organization”
Section 5.0 “Flash Program Memory” Updated Section 5.3 “Programming Operations” with programming
Section 9.0 “Oscillator Configuration” Added Note 2 to the Oscillator System Diagram (see Figure 9-1).
Section 10.0 “Power-Saving
Features”
Section 11.0 “I/O Ports”
Section 18.0 “Serial Peripheral
Interface (SPI)”
Section 20.0 “Universal
Asynchronous Receiver Transmitter
(UART)”
OSCO to OSC2
V
CAP
to V
CAP
Section Name
/V
DDCORE
MAJOR SECTION UPDATES
DDCORE
and V
Updated all pin diagrams to denote the pin voltage tolerance (see “Pin
Diagrams”).
Added Note 2 to the 28-Pin QFN-S and 44-Pin QFN pin diagrams, which
references pin connections to V
Updated AV
Added new section to the data sheet that provides guidelines on getting
started with 16-bit Microcontrollers.
Add Accumulator A and B SFRs (ACCAL, ACCAH, ACCAU, ACCBL,
ACCBH and ACCBU) and updated the Reset value for CORCON in the
CPU Core Register Map (see Table 4-1).
Updated Reset values for IPC3, IPC4, IPC11 and IPC13-IPC15 in the
Interrupt Controller Register Map (see Table 4-5).
Updated the Reset value for CLKDIV in the System Control Register Map
(see Table 4-33).
time formula.
Updated default bit values for DOZE<2:0> and FRCDIV<2:0> in the Clock
Divisor (CLKDIV) Register (see Register 9-2).
Added a paragraph regarding FRC accuracy at the end of Section 9.1.1
“System Clock Sources”.
Added Note 1 to the FRC Oscillator Tuning (OSCTUN) Register (see
Register 9-4).
Added the following registers:
• PMD1: Peripheral Module Disable Control Register 1 (Register 10-1)
• PMD2: Peripheral Module Disable Control Register 2 (Register 10-2)
• PMD3: Peripheral Module Disable Control Register 3 (Register 10-3)
Added reference to pin diagrams for I/O pin availability and functionality
(see Section 11.2 “Open-Drain Configuration”).
Added Note 2 to the SPIxCON1 register (see Register 18-2).
Updated the UTXINV bit settings in the UxSTA register (see
Register 20-2).
DDCORE
/
DD
in the PINOUT I/O Descriptions (see Table 1-1).
Update Description
SS
.
© 2009 Microchip Technology Inc.
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